Commit graph

171 commits

Author SHA1 Message Date
Dario Nieuwenhuis
95234cddba stm32: autogenerate mux config for all chips. 2024-03-01 23:54:37 +01:00
Dario Nieuwenhuis
497515ed57
Merge pull request #2583 from OroArmor/tim_pll_clk
Enable PLL Clocks for TIMx peripherals on STM32F3xx Chips
2024-02-25 22:45:48 +00:00
Eli Orona
e79d2dd756 Move to internal mod and re-export the enums 2024-02-24 12:54:58 -08:00
Dario Nieuwenhuis
e67dfcb04f stm32/dma: add AnyChannel, add support for BDMA on H7. 2024-02-24 02:41:41 +01:00
Eli Orona
88e29608ed Rust fmt 2024-02-20 17:59:51 -08:00
Eli Orona
2ee9b37373 Move to a single Mux Struct. 2024-02-20 17:54:35 -08:00
Eli Orona
e99ef49611 Move to auto-generated based system. 2024-02-16 19:57:00 -08:00
Dario Nieuwenhuis
a3f508e6d1
Merge pull request #2570 from eZioPan/time-driver-singleton
Add missing TIM for time-driver; reorder time-driver selection when use "time-drvier-any"
2024-02-17 02:34:45 +00:00
Dario Nieuwenhuis
ae02467434 stm32: update metapac. 2024-02-16 02:07:21 +01:00
eZio Pan
bbe1eebc53 Add missing TIM for time-driver; reorder time-driver selection when use "time-drvier-any". 2024-02-14 17:43:46 +08:00
Caleb Garrett
1f940bf9e8
Merge branch 'main' into hash 2024-02-03 17:28:20 -05:00
Caleb Garrett
72bbfec39d Added hash DMA implementation. 2024-02-03 16:10:00 -05:00
Dario Nieuwenhuis
9866847375 stm32: autogenerate clocks struct, enable mux for all chips. 2024-02-02 23:24:34 +01:00
Dario Nieuwenhuis
e7d1119750 stm32: automatically use refcounting for rcc bits used multiple times. 2024-02-01 23:15:17 +01:00
Dario Nieuwenhuis
7e02389995
Merge pull request #2410 from eZioPan/waveform-on-CHx
impl waveform with TIM OC Channel DMA
2024-02-01 01:02:01 +00:00
Simon B. Gasse
42d8f3930a Implement MII interface
- Extend the eth/v2 module to support MII besides RMII.
- Replace `Ethernet::new` with `Ethernet::new_mii` and
  `Ethernet::new_rmii`.
- Update ethernet examples.
- Add example for MII ethernet.
2024-02-01 01:33:34 +01:00
Tomasz bla Fortuna
03ba45065e Add FDCAN clock registers to G4 RCC.
Author: Adam Morgan <adam@luci.com>

Break definitions out of bxcan that can be used innm fdcan.

Typo
2024-01-31 05:40:05 +10:00
shufps
4e2361c024 adds timer-driver for tim21 and tim22 (on L0) 2024-01-15 08:11:22 +01:00
eZio Pan
890a1269d0 refactor with clippy 2024-01-06 22:48:21 +08:00
eZio Pan
424ddaf3d9 impl waveform with TIM Channel 2024-01-06 22:22:38 +08:00
Adin Ackerman
34713b4910 fix g0 being left out of some clock controls 2024-01-02 16:03:23 -08:00
eZio Pan
8c2a6df03b implement PWM waveform generating with DMA 2023-12-28 20:09:12 +08:00
Dario Nieuwenhuis
4deae51e65 stm32/sai: deduplicate code for subblocks A/B. 2023-12-19 00:06:30 +01:00
Carlos Barrales Ruiz
78f709a362 * Add GP TIM9 and TIM11 to be used as time_driver 2023-12-09 14:14:34 +01:00
Dario Nieuwenhuis
c27459c052 Update stm32-metapac. 2023-12-08 20:07:59 +01:00
Adam Greig
09d7950313 STM32 DAC: Rework DAC driver, support all families. 2023-11-25 00:29:45 +01:00
Adam Greig
897663e023 STM32: Add cfg to differentiate L4 and L4+ families 2023-11-25 00:29:45 +01:00
Adam Greig
2218d30c80 STM32: Remove vestigal build.rs cfgs, add new flashsize_X and package_X cfgs, use in F3 RCC 2023-11-25 00:29:45 +01:00
Dario Nieuwenhuis
bc65b8f7ec stm32/i2c: add async, dual interrupt scaffolding. 2023-11-24 23:55:45 +01:00
Dario Nieuwenhuis
5221705495 stm32/sai: fix build on chips with only SAI4 (like stm32h725re), improve sync config. 2023-11-19 22:06:05 +01:00
xoviat
239ad5ebea stm32: update metapac and use stop data 2023-11-05 20:09:33 -06:00
xoviat
46cffcc8d4
Merge pull request #2119 from JuliDi/fmc-sram-adc
STM32: Add raw access to FMC peripheral and fix typo in build.rs
2023-11-06 01:31:56 +00:00
Adam Greig
d464d1a841
Remove accidentally leftover println 2023-11-06 01:11:57 +00:00
Adam Greig
28eb4cd817
stm32: support internal output on g4 opamps 2023-11-05 23:57:15 +00:00
xoviat
dc467e89a0 stm32: compute stop mode and workaround rtt test bug 2023-11-04 13:49:54 -05:00
xoviat
e8a3cfaed6 stm32/low-power: refactor refcount 2023-10-25 19:07:31 -05:00
xoviat
9e230b64a4 stm32/build: deterministically generate data 2023-10-23 18:19:42 -05:00
xoviat
a3574e519a stm32: update metapac 2023-10-16 20:04:10 -05:00
xoviat
b24520579a rcc: ahb/apb -> hclk/pclk 2023-10-15 19:51:35 -05:00
JuliDi
2aaf4bf96b
fix typo in build.rs that caused fmc ClkPin to not be implemented 2023-10-15 19:14:34 +02:00
xoviat
4a156df7a1 stm32: expand rcc mux to g4 and h7 2023-10-14 23:33:57 -05:00
xoviat
824556c9c8 rcc: remove mux_prefix from clocks 2023-10-14 12:51:45 -05:00
xoviat
3264941c1b rcc mux: update metapac 2023-10-13 23:06:32 -05:00
Dario Nieuwenhuis
97ca0e77bf stm32: avoid creating many tiny critical sections in init.
Saves 292 bytes on stm32f0 bilnky with max optimizations (from 3132 to 2840).
2023-10-12 16:20:34 +02:00
pbert
65f81a1f57 Remove critical section for reset 2023-10-12 11:04:45 +02:00
pbert
ecdd7c0e2f enable clock first 2023-10-12 11:04:44 +02:00
pbert
f65a96c541 STM32: combine RccPeripherals reset() and enable() to reset_and_enable() 2023-10-12 11:04:19 +02:00
xoviat
57ccc1051a stm32: add initial rcc mux for h5 2023-10-11 20:59:47 -05:00
Dario Nieuwenhuis
70a91945fc stm32: remove atomic-polyfill. 2023-10-12 02:07:26 +02:00
Dario Nieuwenhuis
0cfa8d1bb5 stm32/rcc: use more PLL etc enums from PAC. 2023-10-11 00:12:33 +02:00