The UARTETWISPIn naming is quite horrible. With the nRF53, Nordic realized this
and renamed the interrupts to SERIALn. Let's copy that for our peripheral names, in nrf53 and nrf91.
1170: nrf: add support for UICR configuration. r=Dirbaio a=Dirbaio
- APPROTECT enable/disable. Notably this fixes issues with nrf52-rev3 and nrf53 from locking itself at reset.
- Use NFC pins as GPIO.
- Use RESET pin as GPIO.
NFC and RESET pins singletons are made available only when usable as GPIO, for compile-time checking.
TODO: test
- [x] nrf52 rev1
- [x] nrf52 rev3
- [x] nrf53
- [x] nrf91
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
If the user requests some configuration, but UICR is already programmed
to something else, detect this and warn the user.
We don't do it for the debug port settings, because if they are wrong
then the user will simply not be able to read debug logs.
- APPROTECT enable/disable. Notably this fixes issues with nrf52-rev3 and nrf53 from locking itself at reset.
- Use NFC pins as GPIO.
- Use RESET pin as GPIO.
NFC and RESET pins singletons are made available only when usable as GPIO,
for compile-time checking.
1221: examples/stm32wb: do not reserve words at start of RAM. r=Dirbaio a=Dirbaio
They're used to communicate from the app to ST's OTA bootloader. See AN5247.
This bootloader is optional, must be flashed by the user, and requires changing the FLASH start address as well, so the current memory regions still require modifications to use it. Therefore there's no point in reserving these words.
Thanks `@adamgreig` for investigating the purpose.
bors r+
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
They're used to communicate from the app to ST's OTA bootloader. See AN5247.
This bootloader is optional, must be flashed by the user, and requires changing the FLASH start address as well, so the current memory regions still require modifications to use it. Therefore there's no point in reserving these words.
Thanks @adamgreig for investigating the purpose.
1218: Lora: sx126x: Change timing window to match values found experimentally. r=Dirbaio a=CBJamo
As mentioned in #1188.
1219: stm32/sdmmc: Fix SDIOv1 writes r=Dirbaio a=chemicstry
This fixes writes on sdmmc v1 (SDIO). I'm pretty sure I tested writes in #669, but maybe I was just lucky or I just forgot.
There were two problems:
- Writes require DMA FIFO mode, otherwise SDIO FIFO is under/overrun depending on sdio/pclk2 clock ratio.
- Hardware flow control is broken for sdmmc v1 (I checked F1 and F4 erratas). This causes clock glitches above 12 MHz and results in write CRC errors.
Co-authored-by: Caleb Jamison <caleb@cbjamo.com>
Co-authored-by: chemicstry <chemicstry@gmail.com>
1217: Fix a typo in "PioPeripheral" r=Dirbaio a=SekoiaTree
Renames "PioPeripherial" to "PioPeripheral" (without the second i).
Co-authored-by: sekoia <sequoia.1009@gmail.com>
1215: Add clone to embassy_rp::gpio::Level r=Dirbaio a=Slushee-a
Allows you to wite a cleaner state change detector. Example:
```rs
let mut button_state: Level = Level::Low;
let mut prev_button_state: Level = button_state;
loop {
button_state = button.get_level();
if prev_button_state != button_state {
led.set_level(button_state); // Takes ownership of button_state.
}
prev_button_state = button_state; // Can't be done since the ownership has been moved.
// Adding Clone makes this code possible
}
```
Co-authored-by: Slushee <55996847+Slushee-a@users.noreply.github.com>
1213: stm32: fix fmc-related build failures on some F4's r=Dirbaio a=Dirbaio
f413vh has a peripheral named `FSMC` but using the `FMC` regs. This might be a mistake? `@rmja`
Fix build for now, we can investigate later if the regs are OK.
bors r+
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
1211: Fix rcc prescaler for wl55 HCLK1 r=lulf a=chrenderle
fix "prescaler none" which incorrectly set "prescaler divided by 3"
Issue: #1168
Co-authored-by: Christian Enderle <mail@chrenderle.de>
1210: nrf/qspi: do not panic when canceling futures. r=Dirbaio a=Dirbaio
QSPI can't cancel DMA transfers. Before we'd panic on cancel, now we blocking-wait instead.
Blocking is not great, but it's better than panicking, especially when using code that's hardware-agnostic through the embedded-storage traits.
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
1209: Time: Add from_hz function for Duration. r=Dirbaio a=CBJamo
I found myself doing things like this
```rust
let rate_us = 1_000_000 / rate_hz;
let mut ticker = Ticker::every(Duration::from_micros(rate_us));
```
Several times, and figured it was worth adding a little convenience function to handle that. This also makes the calculation const, which is a nice little upside. The compiler might have been doing that already, but this makes sure.
Speaking of const, would it be better to give hz as a float? Obviously we'd want to avoid that at runtime since many targets don't have a fpu, but if it's at compile time that doesn't matter and a float may be more ergonomic.
Co-authored-by: Caleb Jamison <caleb@cbjamo.com>
1205: stm32/rng Fix rng generation lock-up r=Dirbaio a=lucasgranberg
This PR fixes a problem where the device gets locked in case of rng errors.
The PR also includes a hack for stm32wl based devices where the more complicated RNG peripheral can get stuck on seed errors.
Co-authored-by: Lucas Granberg <lukkeg@gmail.com>
