Commit graph

4120 commits

Author SHA1 Message Date
sander
3bf41e9a06 ci: ad nightly flag to embassy-boot tests 2023-04-20 10:47:40 +02:00
sander
0e01b28d5e embassy-boot: resolve conflicts 2023-04-20 10:40:40 +02:00
sander
8aca324c2d Merge commit '2c1d572cf2e225be5f30435b133e96aa55c9d3af' 2023-04-20 10:38:54 +02:00
sander
7ee9e8322c Merge commit '970a081aab0567a387463610eb204a3b003255f9' 2023-04-20 10:36:15 +02:00
sawi97
43c20dbe65
Merge branch 'embassy-rs:master' into embassy-boot-stable 2023-04-20 10:29:16 +02:00
sander
8cd117fd5d embassy-boot: update readme MSRV to stable 2023-04-20 10:26:02 +02:00
sander
f64d1131b6 embassy-boot: update ci and examples to use the nightly flag 2023-04-20 10:22:44 +02:00
sander
b153a5b0d7 embassy-boot: add nightly feature to stm32 and rp as well 2023-04-20 10:04:41 +02:00
bors[bot]
9b51c8f4d4
Merge #1385
1385: feat: add embassy-boot-rp to the doc builder r=lulf a=elpiel



Co-authored-by: Lachezar Lechev <elpiel93@gmail.com>
2023-04-20 07:12:35 +00:00
sander
510ae7e3dc Merge commit 'eecc41c2e4911c5f1cd232339999424760de9f06' 2023-04-20 08:45:58 +02:00
Lachezar Lechev
f67eb84ec7
chore: add embassy-boot-rp to README
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-04-20 09:20:02 +03:00
Lachezar Lechev
5de6bb3adf
feat: add embassy-boot-rp to the doc builder
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-04-20 09:19:26 +03:00
bors[bot]
54fe50c685
Merge #1384
1384: rp: optimize rom-func-cache for runtime r=Dirbaio a=pennae

storing a full function pointer initialized to a resolver trampoline lets us avoid the runtime cost of checking whether we need to do the initialization. this also slightly reduces flash usage due to a slightly more space-efficient initialization procedure.

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-19 22:26:59 +00:00
pennae
837cdacd16 rp: optimize rom-func-cache for runtime
storing a full function pointer initialized to a resolver trampoline
lets us avoid the runtime cost of checking whether we need to do the
initialization.
2023-04-20 00:07:18 +02:00
bors[bot]
41e90e22e2
Merge #1370
1370: stm32/i2c: fix races when using dma. r=Dirbaio a=xoviat

This change addresses two races:

1. It removes the `chunks_transferred` state variable that is modified inside the interrupt. Analysis of the code reveals that the only time the waker can be woken is when `chunks_transferred` is incremented. Therefore, waking is enough to signal the `poll_fn` that the `chunks_transferred` has incremented. Moving to `remaining_len` clarifies the code, since there is no need to track how many chunks are remaining.
2. It moves the start of the transfer until after the waker is registered, which could theoretically occur if the clock speed is very low, but probably never would even if this wasn't fixed.

There is another race that I noticed: between writes the waker may not yet be registered. In that case, the code would simply be stuck and the `poll_fn` would never be woken. There is no way to resolve this without broadening the scope of the analysis, and this will likely never occur. 

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-04-19 21:36:04 +00:00
xoviat
64b80c2e4d stm32/i2c: ignore wakes without interrupt 2023-04-19 16:16:44 -05:00
bors[bot]
26f4d7d283
Merge #1382
1382: rp: hook up softfloat intrinsics to bootrom r=Dirbaio a=pennae

rp-hal has done this very well already, so we'll just copy their entire impl again. only div.rs needed some massaging because our sio access works a little differently, everything else worked as is.

includes a minor bit of refactoring to make it easier to check which bits we've copied from rp2040-hal and which we haven't.

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-19 21:10:35 +00:00
pennae
fdd6e08ed6 rp: hook up softfloat rom intrinsics
rp-hal has done this very well already, so we'll just copy their entire
impl again. only div.rs needed some massaging because our sio access
works a little differently, everything else worked as is.
2023-04-19 23:04:47 +02:00
sander
7d64de153f Merge commit 'cbe076d763d97f715605d25d8f8815e299c45d46' 2023-04-19 15:41:00 +02:00
bors[bot]
37181c79d9
Merge #1380
1380: Add embassy-net without dhcp to ci.sh r=Dirbaio a=royb3



Co-authored-by: Roy Buitenhuis <roy.buitenhuis94@gmail.com>
2023-04-18 20:28:39 +00:00
Roy Buitenhuis
a2ac1eed1b Add extra feature flags to fix build without dhcp. 2023-04-18 22:11:15 +02:00
Roy Buitenhuis
bfa3cbaf30 Add embassy-net without dhcp to ci.sh 2023-04-18 21:47:28 +02:00
bors[bot]
216b120f15
Merge #1379
1379: enable inline-asm feature for cortex-m in examples r=Dirbaio a=pennae

inline assembly is supported since rust 1.59, we're way past that. enabling this makes the compiled code more compact, and on rp2040 even decreses memory usage by not needing thunks in sram.

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-18 19:25:49 +00:00
bors[bot]
08d9e5981e
Merge #1345
1345: Added a neopixel constructor to spi, with an example in the stm32g0 d… r=Dirbaio a=smeenka

For Spi I added the possibility to use the Spi device as a Neopixel driver, with very precise timing, and not dependent on software during the transfer. Even without the --release flag, the timing is perfect.
Note that between the bursts of data the Mosi line should stay on low level. A resistor of 10k can guarantee that, as it seems the the pin is floating between the bursts (on the nucleo-G070RB platform I use).
I created an example for the STM32G0 family.
This example  does contain a very simple Neopixel driver, only for one type. But this Neopixel driver can easy be adapted to different types (for example RGBW types).


Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
Co-authored-by: anton smeenk <asmeenk@planet.nl>
2023-04-18 19:08:04 +00:00
pennae
8a9136e4e4 enable inline-asm feature for cortex-m in examples
inline assembly is supported since rust 1.59, we're way past that.
enabling this makes the compiled code more compact, and on rp2040
even decreses memory usage by not needing thunks in sram.
2023-04-18 21:07:36 +02:00
anton smeenk
3260f6b2af stm32/spi: add new_txonly_nosck constructor, for neopixels, with an example in the stm32g0 directory. 2023-04-18 20:59:25 +02:00
Dario Nieuwenhuis
2080d8bb6d stm32/spi: add support for all word sizes.
Co-Authored-By: anton smeenk <asmeenk@planet.nl>
2023-04-18 20:56:23 +02:00
Dario Nieuwenhuis
a673b9aa29
Merge pull request #1367 from embassy-rs/update-nightly3
Update nightly.
2023-04-18 18:06:46 +02:00
bors[bot]
38c5b97df0
Merge #1378
1378: Add ability to invert UART pins, take 2 r=Dirbaio a=jakewins

Same PR as before, except this now works :) 

There was a minor hiccup in the UartRx code where the rx pin got passed as the tx argument, so the invert settings didn't get applied. With this fix, my local setup at least is happily reading inverted uart data.

Co-authored-by: Jacob Davis-Hansson <jake@davis-hansson.com>
2023-04-18 15:48:47 +00:00
Jacob Davis-Hansson
21ea98810a Pass rx pin to right init arg 2023-04-18 17:44:19 +02:00
Dario Nieuwenhuis
fbd6eeb748
Merge pull request #1348 from embassy-rs/h5-spi
stm32/dma: refactor
2023-04-18 17:03:24 +02:00
Dario Nieuwenhuis
dbded7a6ce Update nightly.
Includes this TAIT breaking change. https://github.com/rust-lang/rust/pull/110237
2023-04-18 16:59:09 +02:00
Dario Nieuwenhuis
efc70debb3 stm32/dma: add double buffered mode for DMA, update DCMI. 2023-04-18 16:41:24 +02:00
Dario Nieuwenhuis
173c65b543 stm32/dma: refactor. 2023-04-18 16:37:35 +02:00
bors[bot]
a86a100879
Merge #1377
1377: (embassy-stm32): implement embedded-storage traits for full flash struct r=MathiasKoch a=MathiasKoch



Co-authored-by: Mathias <mk@blackbird.online>
2023-04-18 14:05:15 +00:00
Mathias
bba8b0ded5 Missing semi-colon 2023-04-18 16:03:55 +02:00
Mathias
095f5ef279 Add MAX_ERASE_SIZE const in build script, and use it in flash-wide implementation of embedded-storage traits 2023-04-18 15:49:33 +02:00
Mathias
1c68c62ebd Implement embedded-storage traits for full flash struct 2023-04-18 13:48:37 +02:00
xoviat
f5216624bb stm32/i2c: fix races when using dma.
fixes #1341.
2023-04-17 15:24:24 -05:00
Dario Nieuwenhuis
46227bec1e
Merge pull request #1375 from embassy-rs/stm32-sdmmc-refactor
stm32/sdmmc: refactor, simplify code, add HIL test
2023-04-17 22:14:19 +02:00
Dario Nieuwenhuis
e63a34ba21 stm32/sdmmc: add hil test for f4. 2023-04-17 21:49:34 +02:00
Dario Nieuwenhuis
82dd7a5f8c stm32/sdmmc: add init_card retry. 2023-04-17 21:48:47 +02:00
Dario Nieuwenhuis
0dfa192992 stm32/sdmmc: remove "inner" layer. 2023-04-17 19:23:18 +02:00
Dario Nieuwenhuis
e14fa11fc3 stm32/sdmmc: remove unneeded pointer casts. 2023-04-17 17:52:02 +02:00
Dario Nieuwenhuis
df7ef1d98f stm32/sdmmc: remove cfg_if. 2023-04-17 17:52:02 +02:00
bors[bot]
9202dbf32a
Merge #1369
1369: Lora AFIT r=Dirbaio a=Dirbaio

Extracted out of #1367 

Probably we should wait until `rust-lorawan` is merged+released?

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2023-04-17 13:50:49 +00:00
Ulf Lilleengen
4044d728a6
update to released versions 2023-04-17 15:44:58 +02:00
bors[bot]
6acc361109
Merge #1371 #1374
1371: RTC r=Dirbaio a=xoviat

This adds RTC for most of the stm32 chips. Nearly all of the work was not done by me, but I took it the last bit by disabling the chips that weren't working. I think it would be easier to enable them in future PRs if requested.

1374: stm32: remove TIMX singleton when used on timer driver r=Dirbaio a=xoviat

After multiple ways of looking at this, this is the best solution I could think of.

Co-authored-by: Mathias <mk@blackbird.online>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-04-17 01:29:05 +00:00
xoviat
27ec29e2c5 stm32/rtc: remove unused import 2023-04-16 19:32:15 -05:00
xoviat
90c1422381 stm32/rtc: remove chrono datetime and add converters 2023-04-16 19:30:42 -05:00