Commit graph

229 commits

Author SHA1 Message Date
Matous Hybl
f0ba79059e Add v1c ethernet driver for the STM32F7 family. 2021-11-10 10:16:46 +01:00
Dario Nieuwenhuis
2221e1fa93 Replace rustflags with build.rs extra-link-args.
Rustflags apply to ALL the crates in the graph, while we only need
them for the toplevel crate which is the only one getting linked.

Rustflags are not equal for all crates, this caused cargo to re-build the
same dependency crate multiple times uselessly. After this change, deps
are reused more, making builds faster.

Note that this only applies when sharing the target/ dir for multiple crates
in the repo which is not the default.
2021-11-07 23:52:11 +01:00
Matous Hybl
9b5d9fbfca Fix v2 ethernet pin definitions. Fix ethernet example for H7 nucleos. 2021-11-04 16:25:30 +01:00
bors[bot]
1bf6e646c9
Merge #465
465: Adjust for STM32U5. r=lulf a=bobmcwhirter



Co-authored-by: Bob McWhirter <bmcwhirt@redhat.com>
2021-11-02 20:42:41 +00:00
Bob McWhirter
f9c266bc10 Omg. More formatting. 2021-11-02 16:06:49 -04:00
Bob McWhirter
16c88e3094 Need to include a bit of embassy for the NVIC. 2021-11-02 15:58:40 -04:00
Bob McWhirter
9deafa8bab Remove unused imports. 2021-11-02 15:56:04 -04:00
Bob McWhirter
eaaaa2460a Formatting, per usual. 2021-11-02 14:53:53 -04:00
Bob McWhirter
3ab1775820 Add STM32U5 example. 2021-11-02 14:43:42 -04:00
Ulf Lilleengen
205a223af3 Update versions of critical-section and atomic-polyfill 2021-11-02 18:52:03 +01:00
Bob McWhirter
f12b70535b Adjust for STM32U5. 2021-11-02 12:05:24 -04:00
Matous Hybl
015cad84dd Initial support for STM32F767ZI. 2021-10-26 17:33:28 +02:00
Dion Dokter
4d3341dbb9 Fixed examples 2021-10-26 14:47:33 +02:00
Dion Dokter
11655af034 Another redo using the feedback.
PPI is now split up into PPI and DPPI under the name 'interconnect'.
The tasks and events are tracked and reset in the drop function.
2021-10-26 14:47:12 +02:00
Dion Dokter
e6ec81b999 Fixed examples and added defmt format to the new error types 2021-10-26 14:46:39 +02:00
Dion Dokter
65628e1f15 - Added _ppi and _dppi to distinguish between the new and the old peripheral.
- Removed ConfigurableChannel and added capacity numbers to the channels
- Replaced the PPI api with a new one using the DPPI terminology (publish & subscribe)
- Updated all tasks and event registers for DPPI
2021-10-26 14:46:39 +02:00
bors[bot]
01e5376b25
Merge #456
456: Fix L4 clock setup for MSI and PLL to allow RNG operation r=Dirbaio a=lulf

Example is tested on STM32L475VG.

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2021-10-26 11:59:14 +00:00
bors[bot]
f8bd9d2b1c
Merge #441
441: Add implementation of async trait for STM32 I2C v2 r=Dirbaio a=lulf

* Add DMA read implementation for I2C v2
* Add example using DMA for I2C

Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
2021-10-26 11:49:45 +00:00
Ulf Lilleengen
e55726964d Fix clock setup for MSI and PLL to allow RNG opereation
Add RNG example using PLL as clock source.
2021-10-26 13:45:53 +02:00
bors[bot]
f3f3858328
Merge #444
444: nrf: add NVMC driver. r=lulf a=Dirbaio

I haven't implemented `embassy_traits::Flash` because I want to change it to match embedded_storage, which is much better designed. 

Either way, NVMC can't do async anyway, so the best we could do is implementing the async trait in a blocking way...

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-10-23 08:28:25 +00:00
Ulf Lilleengen
504655d491 Use upstream version of rust-lorawan 2021-10-22 19:33:15 +02:00
Dario Nieuwenhuis
e78d226acd nrf: add NVMC driver. 2021-10-22 02:14:33 +02:00
Ulf Lilleengen
f8ebc967a9 Add implementation of async trait for STM32 I2C v2
* Add DMA read implementation for I2C v2
* Add example using DMA for I2C
2021-10-21 12:30:02 +02:00
bors[bot]
acce0f1d25
Merge #440
440: Add i2c example for L4 r=Dirbaio a=lulf

Tested to work on STM32 IOT01A  (STM32L475VG) board.

Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
2021-10-20 11:34:18 +00:00
Ulf Lilleengen
9e461b771a Add i2c example for L4 2021-10-20 10:11:34 +02:00
Ulf Lilleengen
e807a9eaec Specify unit in log output 2021-10-19 15:32:16 +02:00
Ulf Lilleengen
2ef4a45fa0 Add support for temperature sensor peripheral
* Add TEMP peripheral to all nRF52 chips
* Add async HAL for reading temperature values
* Add example application reading temperature values
2021-10-19 07:18:56 +02:00
bors[bot]
a5c11b1a80
Merge #425
425: Implements continuous sampling for the nRF SAADC r=huntc a=huntc

Implements continuous sampling for the nRF SAADC and also renames `OneShot` to `Saadc`. The one-shot behaviour is retained with the `sample` method and a new `run_sampler` method is provided for efficiently (i.e. zero copying) sampler processing. A double buffer is used for continuously sampling, which is swapped appropriately.

A sample frequency is provided and will set the internal timer of the SAADC when there is just one channel being sampled. Otherwise, PPI will be used to hook up the TIMER peripheral to drive the sampling task. Two methods are provided for this: `run_task_sampler` and `run_task_sampler` with the latter available where the compiler sees that just one channel is configured. Note that we set up the PPI and timer behaviour outside of the `Saadc` for maximum flexibility.

A callback is provided to the `run_sampler` method. This is a synchronous callback that should return in a reasonably short space of time. The SAADC could stall if it does not. A reasonable practice is to perform a small amount of processing within the callback to yield a signal, perhaps via `mpsc`. In the case of `mpsc`, the `try_send` method becomes useful.

A new example has been provided to illustrate continuous sampling, along with multiple channels and external timing:

```rust
#[embassy::main]
async fn main(_spawner: Spawner, mut p: Peripherals) {
    let config = Config::default();
    let channel_1_config = ChannelConfig::single_ended(&mut p.P0_02);
    let channel_2_config = ChannelConfig::single_ended(&mut p.P0_03);
    let channel_3_config = ChannelConfig::single_ended(&mut p.P0_04);
    let mut saadc = Saadc::new(
        p.SAADC,
        interrupt::take!(SAADC),
        config,
        [channel_1_config, channel_2_config, channel_3_config],
    );

    let mut timer = Timer::new(p.TIMER0);
    timer.set_frequency(Frequency::F1MHz);
    timer.cc(0).write(100); // We want to sample at 10KHz
    timer.cc(0).short_compare_clear();

    let mut ppi = Ppi::new(p.PPI_CH0);
    ppi.set_event(timer.cc(0).event_compare());
    ppi.set_task(saadc.task_sample());
    ppi.enable();

    timer.start();

    let mut bufs = [[[0; 3]; 50]; 2];

    let mut c = 0;
    let mut a: i32 = 0;

    saadc
        .run_task_sampler(&mut bufs, move |buf| {
            for b in buf {
                a += b[0] as i32;
            }
            c += buf.len();
            if c > 10000 {
                a = a / c as i32;
                info!("channel 1: {=i32}", a);
                c = 0;
                a = 0;
            }
            SamplerState::Sampled
        })
        .await;
}
```

Co-authored-by: huntc <huntchr@gmail.com>
2021-10-18 00:51:19 +00:00
Dario Nieuwenhuis
d7b768992e examples/std: fix warning 2021-10-18 01:37:35 +02:00
huntc
785030df96 Use types to strengthen the buffer dimensioning 2021-10-18 10:26:11 +11:00
huntc
cb56f52b99 Removed the Mode enum and factored out into two functions so that we can assert channel limits 2021-10-18 10:26:11 +11:00
huntc
fa82913bc3 We have to reduce the buffer size to cater for the number of channels to scan 2021-10-18 10:26:11 +11:00
huntc
3be274dc2a We must allow the run handler to mutate state
The handler may well need to close over and mutate state
2021-10-18 10:26:11 +11:00
huntc
103a3305e2 Implements continuous sampling for the nRF SAADC
Implements continuous sampling for the nRF SAADC and also renames `OneShot` to `Saadc`. The one-shot behaviour is retained with the `sample` method and a new `run_sampler` method is provided for efficiently (i.e. zero copying) sampler processing. A double buffer is used for continuously sampling, which wlll be swapped once sampling has taken place.

A sample frequency is provided and will set the internal timer of the SAADC when there is just the one channel being sampled. Otherwise, PPI will be used to hook up the TIMER peripheral to drive the sampling task.
2021-10-18 10:26:11 +11:00
Dario Nieuwenhuis
f5e251fc81 Update clap 2021-10-18 01:19:01 +02:00
Ulf Lilleengen
5ae276fe50 Update to newer revision of async lorawan stack 2021-10-11 13:51:00 +02:00
Dario Nieuwenhuis
902f566b9a
Merge pull request #417 from huntc/extend-saadc
Extend SAADC one shot support
2021-10-11 00:45:49 +02:00
Dario Nieuwenhuis
1c4c813255
Merge pull request #410 from lulf/embassy-lora
Add embassy-lora crate
2021-10-10 21:23:02 +02:00
huntc
cef6158c31 Extend SAADC one shot support
One-shot mode now permits the sampling of differential pins, and the sampling of multiple pins simultaneously.

A new ChannelConfig structure has been introduced so that multiple channels can be configured individually. Further, the `sample` method now accepts a buffer into which samples are written.

Along the way, I've reset some default configuration to align with Nordic's settings in their nrfx saadc driver. Specifically, the channel gain defaults to 6 (from 4) and the time defaults to 10us (from 20us).
2021-10-09 11:25:18 +11:00
Dario Nieuwenhuis
0e05ba688d nrf/saadc: remove Sample trait. 2021-10-07 02:10:22 +02:00
Ulf Lilleengen
16a47a0ad9 Add embassy-lora crate
This crate contains async radio drivers for various lora drivers that
work with embassy timers. The code is imported from Drogue Device (
https://github.com/drogue-iot/drogue-device)

The radio drivers integrate with the async LoRaWAN MAC layer in the
lorawan-device crate.

Also added is an example for the STM32WL55 and for STM32L0 (requires
the LoRa Discovery board) for LoRaWAN. Future work is to make the
underlying radio drivers using fully async SPI when communicating
with the peripheral.
2021-09-30 10:32:24 +02:00
Mariusz Ryndzionek
bce909ec1e Initial STM32F1 family support with two examples for STM32F103C8 (Blue Pill) 2021-09-28 18:31:04 +02:00
Ulf Lilleengen
c79485c286 Support for STM32L1
* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
2021-09-21 14:50:23 +02:00
Ulf Lilleengen
99a94f1d50 Update version of critical-section 2021-09-13 17:05:17 +02:00
Ulf Lilleengen
e24528051b Add WASM support for executor
* Adds an executor for WASM runtimes based on wasm_bindgen.
* Add time driver based on JS time handling.
* Add example that can run in browser locally.
* Update to critical-section version that supports 'std' flag
2021-09-13 16:42:39 +02:00
Dario Nieuwenhuis
70e5877d68 embassy/channel: switch to use MutexKind 2021-09-13 00:08:41 +02:00
Dario Nieuwenhuis
ead987245d embassy: Refactor module structure to remove kitchen-sink util. 2021-09-11 02:35:35 +02:00
Dario Nieuwenhuis
f2623e7e9b Update lots of deps 2021-09-11 01:35:23 +02:00
Dario Nieuwenhuis
eff8ae9c4d
Merge pull request #381 from lulf/stm32wl55-subghz
Add HAL for SubGhz peripheral for STM32 WL series
2021-09-06 00:58:42 +02:00
Dario Nieuwenhuis
de016e8456 Remove trait_alias, allow(incomplete_features).
trait_alias seems unused. no idea why it's there.
2021-09-03 17:00:58 +02:00