c8936edb6c
The bx::* separate structs (Can, Rx, Tx) and separate `Instance` trait are a relic from the `bxcan` crate. Remove them, move the functionality into the main structs.
510 lines
18 KiB
Rust
510 lines
18 KiB
Rust
use core::cmp::Ordering;
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use core::convert::Infallible;
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pub use embedded_can::{ExtendedId, Id, StandardId};
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use stm32_metapac::can::vals::Lec;
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use super::{Mailbox, TransmitStatus};
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use crate::can::enums::BusError;
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use crate::can::frame::{Envelope, Frame, Header};
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pub(crate) struct Registers(pub crate::pac::can::Can);
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impl Registers {
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pub fn enter_init_mode(&mut self) {
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self.0.mcr().modify(|reg| {
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reg.set_sleep(false);
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reg.set_inrq(true);
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});
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loop {
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let msr = self.0.msr().read();
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if !msr.slak() && msr.inak() {
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break;
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}
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}
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}
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// Leaves initialization mode, enters sleep mode.
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pub fn leave_init_mode(&mut self) {
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self.0.mcr().modify(|reg| {
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reg.set_sleep(true);
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reg.set_inrq(false);
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});
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loop {
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let msr = self.0.msr().read();
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if msr.slak() && !msr.inak() {
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break;
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}
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}
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}
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pub fn set_bit_timing(&mut self, bt: crate::can::util::NominalBitTiming) {
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let prescaler = u16::from(bt.prescaler) & 0x1FF;
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let seg1 = u8::from(bt.seg1);
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let seg2 = u8::from(bt.seg2) & 0x7F;
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let sync_jump_width = u8::from(bt.sync_jump_width) & 0x7F;
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self.0.btr().modify(|reg| {
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reg.set_brp(prescaler - 1);
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reg.set_ts(0, seg1 - 1);
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reg.set_ts(1, seg2 - 1);
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reg.set_sjw(sync_jump_width - 1);
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});
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}
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/// Enables or disables silent mode: Disconnects the TX signal from the pin.
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pub fn set_silent(&self, enabled: bool) {
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let mode = match enabled {
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false => stm32_metapac::can::vals::Silm::NORMAL,
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true => stm32_metapac::can::vals::Silm::SILENT,
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};
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self.0.btr().modify(|reg| reg.set_silm(mode));
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}
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/// Enables or disables automatic retransmission of messages.
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///
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/// If this is enabled, the CAN peripheral will automatically try to retransmit each frame
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/// until it can be sent. Otherwise, it will try only once to send each frame.
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///
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/// Automatic retransmission is enabled by default.
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pub fn set_automatic_retransmit(&self, enabled: bool) {
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self.0.mcr().modify(|reg| reg.set_nart(enabled));
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}
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/// Enables or disables loopback mode: Internally connects the TX and RX
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/// signals together.
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pub fn set_loopback(&self, enabled: bool) {
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self.0.btr().modify(|reg| reg.set_lbkm(enabled));
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}
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/// Configures the automatic wake-up feature.
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///
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/// This is turned off by default.
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///
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/// When turned on, an incoming frame will cause the peripheral to wake up from sleep and
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/// receive the frame. If enabled, [`Interrupt::Wakeup`] will also be triggered by the incoming
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/// frame.
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#[allow(dead_code)]
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pub fn set_automatic_wakeup(&mut self, enabled: bool) {
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self.0.mcr().modify(|reg| reg.set_awum(enabled));
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}
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/// Leaves initialization mode and enables the peripheral (non-blocking version).
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///
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/// Usually, it is recommended to call [`CanConfig::enable`] instead. This method is only needed
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/// if you want non-blocking initialization.
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///
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/// If this returns [`WouldBlock`][nb::Error::WouldBlock], the peripheral will enable itself
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/// in the background. The peripheral is enabled and ready to use when this method returns
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/// successfully.
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pub fn enable_non_blocking(&mut self) -> nb::Result<(), Infallible> {
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let msr = self.0.msr().read();
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if msr.slak() {
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self.0.mcr().modify(|reg| {
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reg.set_abom(true);
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reg.set_sleep(false);
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});
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Err(nb::Error::WouldBlock)
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} else {
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Ok(())
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}
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}
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/// Puts the peripheral in a sleep mode to save power.
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///
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/// While in sleep mode, an incoming CAN frame will trigger [`Interrupt::Wakeup`] if enabled.
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#[allow(dead_code)]
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pub fn sleep(&mut self) {
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self.0.mcr().modify(|reg| {
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reg.set_sleep(true);
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reg.set_inrq(false);
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});
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loop {
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let msr = self.0.msr().read();
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if msr.slak() && !msr.inak() {
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break;
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}
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}
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}
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/// Wakes up from sleep mode.
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///
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/// Note that this will not trigger [`Interrupt::Wakeup`], only reception of an incoming CAN
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/// frame will cause that interrupt.
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#[allow(dead_code)]
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pub fn wakeup(&mut self) {
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self.0.mcr().modify(|reg| {
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reg.set_sleep(false);
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reg.set_inrq(false);
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});
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loop {
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let msr = self.0.msr().read();
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if !msr.slak() && !msr.inak() {
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break;
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}
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}
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}
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pub fn curr_error(&self) -> Option<BusError> {
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let err = { self.0.esr().read() };
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if err.boff() {
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return Some(BusError::BusOff);
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} else if err.epvf() {
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return Some(BusError::BusPassive);
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} else if err.ewgf() {
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return Some(BusError::BusWarning);
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} else if err.lec() != Lec::NOERROR {
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return Some(match err.lec() {
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Lec::STUFF => BusError::Stuff,
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Lec::FORM => BusError::Form,
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Lec::ACK => BusError::Acknowledge,
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Lec::BITRECESSIVE => BusError::BitRecessive,
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Lec::BITDOMINANT => BusError::BitDominant,
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Lec::CRC => BusError::Crc,
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Lec::CUSTOM => BusError::Software,
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Lec::NOERROR => unreachable!(),
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});
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}
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None
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}
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/// Puts a CAN frame in a transmit mailbox for transmission on the bus.
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///
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/// Frames are transmitted to the bus based on their priority (see [`FramePriority`]).
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/// Transmit order is preserved for frames with identical priority.
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///
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/// If all transmit mailboxes are full, and `frame` has a higher priority than the
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/// lowest-priority message in the transmit mailboxes, transmission of the enqueued frame is
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/// cancelled and `frame` is enqueued instead. The frame that was replaced is returned as
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/// [`TransmitStatus::dequeued_frame`].
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pub fn transmit(&mut self, frame: &Frame) -> nb::Result<TransmitStatus, Infallible> {
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// Get the index of the next free mailbox or the one with the lowest priority.
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let tsr = self.0.tsr().read();
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let idx = tsr.code() as usize;
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let frame_is_pending = !tsr.tme(0) || !tsr.tme(1) || !tsr.tme(2);
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let pending_frame = if frame_is_pending {
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// High priority frames are transmitted first by the mailbox system.
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// Frames with identical identifier shall be transmitted in FIFO order.
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// The controller schedules pending frames of same priority based on the
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// mailbox index instead. As a workaround check all pending mailboxes
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// and only accept higher priority frames.
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self.check_priority(0, frame.id().into())?;
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self.check_priority(1, frame.id().into())?;
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self.check_priority(2, frame.id().into())?;
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let all_frames_are_pending = !tsr.tme(0) && !tsr.tme(1) && !tsr.tme(2);
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if all_frames_are_pending {
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// No free mailbox is available. This can only happen when three frames with
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// ascending priority (descending IDs) were requested for transmission and all
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// of them are blocked by bus traffic with even higher priority.
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// To prevent a priority inversion abort and replace the lowest priority frame.
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self.read_pending_mailbox(idx)
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} else {
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// There was a free mailbox.
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None
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}
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} else {
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// All mailboxes are available: Send frame without performing any checks.
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None
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};
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self.write_mailbox(idx, frame);
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let mailbox = match idx {
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0 => Mailbox::Mailbox0,
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1 => Mailbox::Mailbox1,
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2 => Mailbox::Mailbox2,
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_ => unreachable!(),
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};
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Ok(TransmitStatus {
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dequeued_frame: pending_frame,
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mailbox,
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})
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}
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/// Returns `Ok` when the mailbox is free or if it contains pending frame with a
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/// lower priority (higher ID) than the identifier `id`.
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fn check_priority(&self, idx: usize, id: IdReg) -> nb::Result<(), Infallible> {
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// Read the pending frame's id to check its priority.
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assert!(idx < 3);
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let tir = &self.0.tx(idx).tir().read();
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//let tir = &can.tx[idx].tir.read();
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// Check the priority by comparing the identifiers. But first make sure the
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// frame has not finished the transmission (`TXRQ` == 0) in the meantime.
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if tir.txrq() && id <= IdReg::from_register(tir.0) {
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// There's a mailbox whose priority is higher or equal
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// the priority of the new frame.
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return Err(nb::Error::WouldBlock);
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}
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Ok(())
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}
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fn write_mailbox(&mut self, idx: usize, frame: &Frame) {
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debug_assert!(idx < 3);
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let mb = self.0.tx(idx);
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mb.tdtr().write(|w| w.set_dlc(frame.header().len() as u8));
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mb.tdlr()
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.write(|w| w.0 = u32::from_ne_bytes(frame.data()[0..4].try_into().unwrap()));
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mb.tdhr()
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.write(|w| w.0 = u32::from_ne_bytes(frame.data()[4..8].try_into().unwrap()));
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let id: IdReg = frame.id().into();
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mb.tir().write(|w| {
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w.0 = id.0;
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w.set_txrq(true);
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});
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}
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fn read_pending_mailbox(&mut self, idx: usize) -> Option<Frame> {
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if self.abort_by_index(idx) {
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debug_assert!(idx < 3);
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let mb = self.0.tx(idx);
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let id = IdReg(mb.tir().read().0);
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let mut data = [0xff; 8];
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data[0..4].copy_from_slice(&mb.tdlr().read().0.to_ne_bytes());
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data[4..8].copy_from_slice(&mb.tdhr().read().0.to_ne_bytes());
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let len = mb.tdtr().read().dlc();
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Some(Frame::new(Header::new(id.id(), len, id.rtr()), &data).unwrap())
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} else {
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// Abort request failed because the frame was already sent (or being sent) on
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// the bus. All mailboxes are now free. This can happen for small prescaler
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// values (e.g. 1MBit/s bit timing with a source clock of 8MHz) or when an ISR
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// has preempted the execution.
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None
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}
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}
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/// Tries to abort a pending frame. Returns `true` when aborted.
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fn abort_by_index(&mut self, idx: usize) -> bool {
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self.0.tsr().write(|reg| reg.set_abrq(idx, true));
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// Wait for the abort request to be finished.
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loop {
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let tsr = self.0.tsr().read();
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if false == tsr.abrq(idx) {
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break tsr.txok(idx) == false;
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}
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}
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}
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/// Attempts to abort the sending of a frame that is pending in a mailbox.
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///
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/// If there is no frame in the provided mailbox, or its transmission succeeds before it can be
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/// aborted, this function has no effect and returns `false`.
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///
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/// If there is a frame in the provided mailbox, and it is canceled successfully, this function
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/// returns `true`.
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pub fn abort(&mut self, mailbox: Mailbox) -> bool {
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// If the mailbox is empty, the value of TXOKx depends on what happened with the previous
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// frame in that mailbox. Only call abort_by_index() if the mailbox is not empty.
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let tsr = self.0.tsr().read();
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let mailbox_empty = match mailbox {
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Mailbox::Mailbox0 => tsr.tme(0),
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Mailbox::Mailbox1 => tsr.tme(1),
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Mailbox::Mailbox2 => tsr.tme(2),
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};
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if mailbox_empty {
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false
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} else {
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self.abort_by_index(mailbox as usize)
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}
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}
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/// Returns `true` if no frame is pending for transmission.
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pub fn is_idle(&self) -> bool {
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let tsr = self.0.tsr().read();
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tsr.tme(0) && tsr.tme(1) && tsr.tme(2)
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}
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pub fn receive_frame_available(&self) -> bool {
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if self.0.rfr(0).read().fmp() != 0 {
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true
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} else if self.0.rfr(1).read().fmp() != 0 {
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true
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} else {
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false
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}
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}
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pub fn receive_fifo(&self, fifo: RxFifo) -> Option<Envelope> {
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// Generate timestamp as early as possible
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#[cfg(feature = "time")]
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let ts = embassy_time::Instant::now();
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use crate::pac::can::vals::Ide;
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let fifo_idx = match fifo {
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RxFifo::Fifo0 => 0usize,
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RxFifo::Fifo1 => 1usize,
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};
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let rfr = self.0.rfr(fifo_idx);
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let fifo = self.0.rx(fifo_idx);
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// If there are no pending messages, there is nothing to do
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if rfr.read().fmp() == 0 {
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return None;
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}
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let rir = fifo.rir().read();
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let id: embedded_can::Id = if rir.ide() == Ide::STANDARD {
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embedded_can::StandardId::new(rir.stid()).unwrap().into()
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} else {
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let stid = (rir.stid() & 0x7FF) as u32;
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let exid = rir.exid() & 0x3FFFF;
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let id = (stid << 18) | (exid);
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embedded_can::ExtendedId::new(id).unwrap().into()
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};
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let rdtr = fifo.rdtr().read();
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let data_len = rdtr.dlc();
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let rtr = rir.rtr() == stm32_metapac::can::vals::Rtr::REMOTE;
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#[cfg(not(feature = "time"))]
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let ts = rdtr.time();
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let mut data: [u8; 8] = [0; 8];
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data[0..4].copy_from_slice(&fifo.rdlr().read().0.to_ne_bytes());
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data[4..8].copy_from_slice(&fifo.rdhr().read().0.to_ne_bytes());
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let frame = Frame::new(Header::new(id, data_len, rtr), &data).unwrap();
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let envelope = Envelope { ts, frame };
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rfr.modify(|v| v.set_rfom(true));
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Some(envelope)
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}
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}
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/// Identifier of a CAN message.
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///
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/// Can be either a standard identifier (11bit, Range: 0..0x3FF) or a
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/// extendended identifier (29bit , Range: 0..0x1FFFFFFF).
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///
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/// The `Ord` trait can be used to determine the frame’s priority this ID
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/// belongs to.
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/// Lower identifier values have a higher priority. Additionally standard frames
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/// have a higher priority than extended frames and data frames have a higher
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/// priority than remote frames.
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub(crate) struct IdReg(u32);
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impl IdReg {
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const STANDARD_SHIFT: u32 = 21;
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const EXTENDED_SHIFT: u32 = 3;
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const IDE_MASK: u32 = 0x0000_0004;
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const RTR_MASK: u32 = 0x0000_0002;
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/// Creates a new standard identifier (11bit, Range: 0..0x7FF)
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///
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/// Panics for IDs outside the allowed range.
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fn new_standard(id: StandardId) -> Self {
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Self(u32::from(id.as_raw()) << Self::STANDARD_SHIFT)
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}
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/// Creates a new extendended identifier (29bit , Range: 0..0x1FFFFFFF).
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///
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/// Panics for IDs outside the allowed range.
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fn new_extended(id: ExtendedId) -> IdReg {
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Self(id.as_raw() << Self::EXTENDED_SHIFT | Self::IDE_MASK)
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}
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fn from_register(reg: u32) -> IdReg {
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Self(reg & 0xFFFF_FFFE)
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}
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/// Returns the identifier.
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fn to_id(self) -> Id {
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if self.is_extended() {
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Id::Extended(unsafe { ExtendedId::new_unchecked(self.0 >> Self::EXTENDED_SHIFT) })
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} else {
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Id::Standard(unsafe { StandardId::new_unchecked((self.0 >> Self::STANDARD_SHIFT) as u16) })
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}
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}
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/// Returns the identifier.
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fn id(self) -> embedded_can::Id {
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if self.is_extended() {
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embedded_can::ExtendedId::new(self.0 >> Self::EXTENDED_SHIFT)
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.unwrap()
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.into()
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} else {
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embedded_can::StandardId::new((self.0 >> Self::STANDARD_SHIFT) as u16)
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.unwrap()
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.into()
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}
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}
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/// Returns `true` if the identifier is an extended identifier.
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fn is_extended(self) -> bool {
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self.0 & Self::IDE_MASK != 0
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}
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/// Returns `true` if the identifer is part of a remote frame (RTR bit set).
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fn rtr(self) -> bool {
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self.0 & Self::RTR_MASK != 0
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}
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}
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impl From<&embedded_can::Id> for IdReg {
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fn from(eid: &embedded_can::Id) -> Self {
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match eid {
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embedded_can::Id::Standard(id) => IdReg::new_standard(StandardId::new(id.as_raw()).unwrap()),
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embedded_can::Id::Extended(id) => IdReg::new_extended(ExtendedId::new(id.as_raw()).unwrap()),
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}
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}
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}
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impl From<IdReg> for embedded_can::Id {
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fn from(idr: IdReg) -> Self {
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idr.id()
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}
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}
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/// `IdReg` is ordered by priority.
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impl Ord for IdReg {
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fn cmp(&self, other: &Self) -> Ordering {
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// When the IDs match, data frames have priority over remote frames.
|
||
let rtr = self.rtr().cmp(&other.rtr()).reverse();
|
||
|
||
let id_a = self.to_id();
|
||
let id_b = other.to_id();
|
||
match (id_a, id_b) {
|
||
(Id::Standard(a), Id::Standard(b)) => {
|
||
// Lower IDs have priority over higher IDs.
|
||
a.as_raw().cmp(&b.as_raw()).reverse().then(rtr)
|
||
}
|
||
(Id::Extended(a), Id::Extended(b)) => a.as_raw().cmp(&b.as_raw()).reverse().then(rtr),
|
||
(Id::Standard(a), Id::Extended(b)) => {
|
||
// Standard frames have priority over extended frames if their Base IDs match.
|
||
a.as_raw()
|
||
.cmp(&b.standard_id().as_raw())
|
||
.reverse()
|
||
.then(Ordering::Greater)
|
||
}
|
||
(Id::Extended(a), Id::Standard(b)) => {
|
||
a.standard_id().as_raw().cmp(&b.as_raw()).reverse().then(Ordering::Less)
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
impl PartialOrd for IdReg {
|
||
fn partial_cmp(&self, other: &Self) -> Option<Ordering> {
|
||
Some(self.cmp(other))
|
||
}
|
||
}
|
||
|
||
#[derive(Debug, Copy, Clone, Eq, PartialEq)]
|
||
pub(crate) enum RxFifo {
|
||
Fifo0,
|
||
Fifo1,
|
||
}
|