1023 lines
31 KiB
Rust
1023 lines
31 KiB
Rust
//! TSC Peripheral Interface
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//!
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//!
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//! # Example (stm32)
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//! ``` rust, ignore
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//!
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//! let mut device_config = embassy_stm32::Config::default();
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//! {
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//! device_config.rcc.mux = ClockSrc::MSI(Msirange::RANGE_4MHZ);
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//! }
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//!
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//! let context = embassy_stm32::init(device_config);
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//!
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//! let config = tsc::Config {
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//! ct_pulse_high_length: ChargeTransferPulseCycle::_2,
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//! ct_pulse_low_length: ChargeTransferPulseCycle::_2,
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//! spread_spectrum: false,
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//! spread_spectrum_deviation: SSDeviation::new(2).unwrap(),
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//! spread_spectrum_prescaler: false,
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//! pulse_generator_prescaler: PGPrescalerDivider::_4,
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//! max_count_value: MaxCount::_8191,
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//! io_default_mode: false,
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//! synchro_pin_polarity: false,
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//! acquisition_mode: false,
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//! max_count_interrupt: false,
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//! channel_ios: TscIOPin::Group2Io2 | TscIOPin::Group7Io3,
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//! shield_ios: TscIOPin::Group1Io3.into(),
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//! sampling_ios: TscIOPin::Group1Io2 | TscIOPin::Group2Io1 | TscIOPin::Group7Io2,
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//! };
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//!
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//! let mut g1: PinGroup<embassy_stm32::peripherals::TSC, G1> = PinGroup::new();
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//! g1.set_io2(context.PB13, PinType::Sample);
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//! g1.set_io3(context.PB14, PinType::Shield);
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//!
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//! let mut g2: PinGroup<embassy_stm32::peripherals::TSC, G2> = PinGroup::new();
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//! g2.set_io1(context.PB4, PinType::Sample);
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//! g2.set_io2(context.PB5, PinType::Channel);
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//!
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//! let mut g7: PinGroup<embassy_stm32::peripherals::TSC, G7> = PinGroup::new();
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//! g7.set_io2(context.PE3, PinType::Sample);
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//! g7.set_io3(context.PE4, PinType::Channel);
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//!
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//! let mut touch_controller = tsc::Tsc::new(
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//! context.TSC,
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//! Some(g1),
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//! Some(g2),
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//! None,
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//! None,
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//! None,
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//! None,
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//! Some(g7),
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//! None,
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//! config,
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//! );
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//!
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//! touch_controller.discharge_io(true);
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//! Timer::after_millis(1).await;
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//!
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//! touch_controller.start();
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//!
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//! ```
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#![macro_use]
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/// Enums defined for peripheral parameters
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pub mod enums;
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use core::future::poll_fn;
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use core::marker::PhantomData;
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use core::task::Poll;
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use embassy_hal_internal::{into_ref, PeripheralRef};
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use embassy_sync::waitqueue::AtomicWaker;
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pub use enums::*;
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use crate::gpio::{AfType, AnyPin, OutputType, Speed};
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use crate::interrupt::typelevel::Interrupt;
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use crate::mode::{Async, Blocking, Mode as PeriMode};
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use crate::rcc::{self, RccPeripheral};
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use crate::{interrupt, peripherals, Peripheral};
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#[cfg(tsc_v1)]
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const TSC_NUM_GROUPS: u32 = 6;
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#[cfg(tsc_v2)]
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const TSC_NUM_GROUPS: u32 = 7;
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#[cfg(tsc_v3)]
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const TSC_NUM_GROUPS: u32 = 8;
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/// Error type defined for TSC
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#[derive(Debug, Clone, Copy)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Error {
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/// Test error for TSC
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Test,
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}
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/// TSC interrupt handler.
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pub struct InterruptHandler<T: Instance> {
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_phantom: PhantomData<T>,
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}
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impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
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unsafe fn on_interrupt() {
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T::regs().ier().write(|w| w.set_eoaie(false));
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T::waker().wake();
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}
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}
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/// Pin type definition to control IO parameters
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pub enum PinType {
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/// Sensing channel pin connected to an electrode
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Channel,
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/// Sampling capacitor pin, one required for every pin group
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Sample,
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/// Shield pin connected to capacitive sensing shield
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Shield,
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}
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/// Peripheral state
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#[derive(PartialEq, Clone, Copy)]
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pub enum State {
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/// Peripheral is being setup or reconfigured
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Reset,
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/// Ready to start acquisition
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Ready,
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/// In process of sensor acquisition
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Busy,
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/// Error occured during acquisition
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Error,
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}
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/// Individual group status checked after acquisition reported as complete
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/// For groups with multiple channel pins, may take longer because acquisitions
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/// are done sequentially. Check this status before pulling count for each
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/// sampled channel
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#[derive(PartialEq)]
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pub enum GroupStatus {
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/// Acquisition for channel still in progress
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Ongoing,
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/// Acquisition either not started or complete
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Complete,
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}
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/// Group identifier used to interrogate status
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#[allow(missing_docs)]
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pub enum Group {
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One,
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Two,
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Three,
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Four,
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Five,
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Six,
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#[cfg(any(tsc_v2, tsc_v3))]
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Seven,
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#[cfg(tsc_v3)]
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Eight,
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}
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impl Into<usize> for Group {
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fn into(self) -> usize {
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match self {
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Group::One => 0,
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Group::Two => 1,
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Group::Three => 2,
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Group::Four => 3,
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Group::Five => 4,
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Group::Six => 5,
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#[cfg(any(tsc_v2, tsc_v3))]
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Group::Seven => 6,
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#[cfg(tsc_v3)]
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Group::Eight => 7,
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}
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}
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}
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/// Peripheral configuration
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#[derive(Clone, Copy)]
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pub struct Config {
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/// Duration of high state of the charge transfer pulse
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pub ct_pulse_high_length: ChargeTransferPulseCycle,
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/// Duration of the low state of the charge transfer pulse
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pub ct_pulse_low_length: ChargeTransferPulseCycle,
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/// Enable/disable of spread spectrum feature
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pub spread_spectrum: bool,
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/// Adds variable number of periods of the SS clk to pulse high state
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pub spread_spectrum_deviation: SSDeviation,
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/// Selects AHB clock divider used to generate SS clk
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pub spread_spectrum_prescaler: bool,
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/// Selects AHB clock divider used to generate pulse generator clk
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pub pulse_generator_prescaler: PGPrescalerDivider,
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/// Maximum number of charge tranfer pulses that can be generated before error
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pub max_count_value: MaxCount,
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/// Defines config of all IOs when no ongoing acquisition
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pub io_default_mode: bool,
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/// Polarity of sync input pin
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pub synchro_pin_polarity: bool,
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/// Acquisition starts when start bit is set or with sync pin input
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pub acquisition_mode: bool,
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/// Enable max count interrupt
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pub max_count_interrupt: bool,
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/// Channel IO mask
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pub channel_ios: u32,
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/// Shield IO mask
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pub shield_ios: u32,
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/// Sampling IO mask
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pub sampling_ios: u32,
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}
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impl Default for Config {
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fn default() -> Self {
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Self {
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ct_pulse_high_length: ChargeTransferPulseCycle::_1,
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ct_pulse_low_length: ChargeTransferPulseCycle::_1,
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spread_spectrum: false,
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spread_spectrum_deviation: SSDeviation::new(1).unwrap(),
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spread_spectrum_prescaler: false,
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pulse_generator_prescaler: PGPrescalerDivider::_1,
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max_count_value: MaxCount::_255,
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io_default_mode: false,
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synchro_pin_polarity: false,
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acquisition_mode: false,
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max_count_interrupt: false,
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channel_ios: 0,
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shield_ios: 0,
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sampling_ios: 0,
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}
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}
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}
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/// Pin struct that maintains usage
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#[allow(missing_docs)]
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pub struct TscPin<'d, T, C> {
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_pin: PeripheralRef<'d, AnyPin>,
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role: PinType,
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phantom: PhantomData<(T, C)>,
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}
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enum GroupError {
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NoSample,
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ChannelShield,
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}
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/// Pin group definition
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/// Pins are organized into groups of four IOs, all groups with a
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/// sampling channel must also have a sampling capacitor channel.
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#[allow(missing_docs)]
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#[derive(Default)]
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pub struct PinGroup<'d, T, C> {
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d1: Option<TscPin<'d, T, C>>,
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d2: Option<TscPin<'d, T, C>>,
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d3: Option<TscPin<'d, T, C>>,
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d4: Option<TscPin<'d, T, C>>,
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}
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impl<'d, T: Instance, C> PinGroup<'d, T, C> {
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/// Create new sensing group
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pub fn new() -> Self {
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Self {
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d1: None,
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d2: None,
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d3: None,
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d4: None,
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}
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}
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fn contains_shield(&self) -> bool {
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let mut shield_count = 0;
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if let Some(pin) = &self.d1 {
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if let PinType::Shield = pin.role {
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shield_count += 1;
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}
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}
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if let Some(pin) = &self.d2 {
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if let PinType::Shield = pin.role {
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shield_count += 1;
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}
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}
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if let Some(pin) = &self.d3 {
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if let PinType::Shield = pin.role {
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shield_count += 1;
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}
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}
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if let Some(pin) = &self.d4 {
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if let PinType::Shield = pin.role {
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shield_count += 1;
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}
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}
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shield_count == 1
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}
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fn check_group(&self) -> Result<(), GroupError> {
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let mut channel_count = 0;
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let mut shield_count = 0;
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let mut sample_count = 0;
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if let Some(pin) = &self.d1 {
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match pin.role {
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PinType::Channel => {
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channel_count += 1;
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}
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PinType::Shield => {
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shield_count += 1;
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}
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PinType::Sample => {
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sample_count += 1;
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}
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}
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}
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if let Some(pin) = &self.d2 {
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match pin.role {
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PinType::Channel => {
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channel_count += 1;
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}
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PinType::Shield => {
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shield_count += 1;
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}
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PinType::Sample => {
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sample_count += 1;
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}
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}
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}
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if let Some(pin) = &self.d3 {
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match pin.role {
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PinType::Channel => {
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channel_count += 1;
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}
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PinType::Shield => {
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shield_count += 1;
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}
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PinType::Sample => {
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sample_count += 1;
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}
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}
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}
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if let Some(pin) = &self.d4 {
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match pin.role {
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PinType::Channel => {
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channel_count += 1;
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}
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PinType::Shield => {
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shield_count += 1;
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}
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PinType::Sample => {
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sample_count += 1;
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}
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}
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}
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// Every group requires one sampling capacitor
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if sample_count != 1 {
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return Err(GroupError::NoSample);
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}
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// Each group must have at least one shield or channel IO
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if shield_count == 0 && channel_count == 0 {
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return Err(GroupError::ChannelShield);
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}
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// Any group can either contain channel ios or a shield IO
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if shield_count != 0 && channel_count != 0 {
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return Err(GroupError::ChannelShield);
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}
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// No more than one shield IO is allow per group and amongst all groups
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if shield_count > 1 {
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return Err(GroupError::ChannelShield);
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}
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Ok(())
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}
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}
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macro_rules! group_impl {
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($group:ident, $trait1:ident, $trait2:ident, $trait3:ident, $trait4:ident) => {
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impl<'d, T: Instance> PinGroup<'d, T, $group> {
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#[doc = concat!("Create a new pin1 for ", stringify!($group), " TSC group instance.")]
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pub fn set_io1(&mut self, pin: impl Peripheral<P = impl $trait1<T>> + 'd, role: PinType) {
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into_ref!(pin);
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critical_section::with(|_| {
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pin.set_low();
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pin.set_as_af(
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pin.af_num(),
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AfType::output(
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match role {
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PinType::Channel => OutputType::PushPull,
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PinType::Sample => OutputType::OpenDrain,
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PinType::Shield => OutputType::PushPull,
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},
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Speed::VeryHigh,
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),
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);
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self.d1 = Some(TscPin {
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_pin: pin.map_into(),
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role: role,
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phantom: PhantomData,
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})
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})
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}
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#[doc = concat!("Create a new pin2 for ", stringify!($group), " TSC group instance.")]
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pub fn set_io2(&mut self, pin: impl Peripheral<P = impl $trait2<T>> + 'd, role: PinType) {
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into_ref!(pin);
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critical_section::with(|_| {
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pin.set_low();
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pin.set_as_af(
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pin.af_num(),
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AfType::output(
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match role {
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PinType::Channel => OutputType::PushPull,
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PinType::Sample => OutputType::OpenDrain,
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PinType::Shield => OutputType::PushPull,
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},
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Speed::VeryHigh,
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),
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);
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self.d2 = Some(TscPin {
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_pin: pin.map_into(),
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role: role,
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phantom: PhantomData,
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})
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})
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}
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#[doc = concat!("Create a new pin3 for ", stringify!($group), " TSC group instance.")]
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pub fn set_io3(&mut self, pin: impl Peripheral<P = impl $trait3<T>> + 'd, role: PinType) {
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into_ref!(pin);
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critical_section::with(|_| {
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pin.set_low();
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pin.set_as_af(
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pin.af_num(),
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AfType::output(
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match role {
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PinType::Channel => OutputType::PushPull,
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PinType::Sample => OutputType::OpenDrain,
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PinType::Shield => OutputType::PushPull,
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},
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Speed::VeryHigh,
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),
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);
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self.d3 = Some(TscPin {
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_pin: pin.map_into(),
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role: role,
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phantom: PhantomData,
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})
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})
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}
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#[doc = concat!("Create a new pin4 for ", stringify!($group), " TSC group instance.")]
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pub fn set_io4(&mut self, pin: impl Peripheral<P = impl $trait4<T>> + 'd, role: PinType) {
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into_ref!(pin);
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critical_section::with(|_| {
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pin.set_low();
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pin.set_as_af(
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pin.af_num(),
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AfType::output(
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match role {
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PinType::Channel => OutputType::PushPull,
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PinType::Sample => OutputType::OpenDrain,
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PinType::Shield => OutputType::PushPull,
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},
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Speed::VeryHigh,
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),
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);
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self.d4 = Some(TscPin {
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_pin: pin.map_into(),
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role: role,
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phantom: PhantomData,
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})
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})
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}
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}
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};
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}
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group_impl!(G1, G1IO1Pin, G1IO2Pin, G1IO3Pin, G1IO4Pin);
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group_impl!(G2, G2IO1Pin, G2IO2Pin, G2IO3Pin, G2IO4Pin);
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group_impl!(G3, G3IO1Pin, G3IO2Pin, G3IO3Pin, G3IO4Pin);
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group_impl!(G4, G4IO1Pin, G4IO2Pin, G4IO3Pin, G4IO4Pin);
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group_impl!(G5, G5IO1Pin, G5IO2Pin, G5IO3Pin, G5IO4Pin);
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group_impl!(G6, G6IO1Pin, G6IO2Pin, G6IO3Pin, G6IO4Pin);
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group_impl!(G7, G7IO1Pin, G7IO2Pin, G7IO3Pin, G7IO4Pin);
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group_impl!(G8, G8IO1Pin, G8IO2Pin, G8IO3Pin, G8IO4Pin);
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/// Group 1 marker type.
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pub enum G1 {}
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/// Group 2 marker type.
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pub enum G2 {}
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/// Group 3 marker type.
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pub enum G3 {}
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/// Group 4 marker type.
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pub enum G4 {}
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/// Group 5 marker type.
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pub enum G5 {}
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/// Group 6 marker type.
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pub enum G6 {}
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/// Group 7 marker type.
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pub enum G7 {}
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/// Group 8 marker type.
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pub enum G8 {}
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/// TSC driver
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pub struct Tsc<'d, T: Instance, K: PeriMode> {
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_peri: PeripheralRef<'d, T>,
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_g1: Option<PinGroup<'d, T, G1>>,
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_g2: Option<PinGroup<'d, T, G2>>,
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_g3: Option<PinGroup<'d, T, G3>>,
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_g4: Option<PinGroup<'d, T, G4>>,
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_g5: Option<PinGroup<'d, T, G5>>,
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_g6: Option<PinGroup<'d, T, G6>>,
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#[cfg(any(tsc_v2, tsc_v3))]
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_g7: Option<PinGroup<'d, T, G7>>,
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#[cfg(tsc_v3)]
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_g8: Option<PinGroup<'d, T, G8>>,
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state: State,
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config: Config,
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_kind: PhantomData<K>,
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}
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|
|
impl<'d, T: Instance> Tsc<'d, T, Async> {
|
|
/// Create a Tsc instance that can be awaited for completion
|
|
pub fn new_async(
|
|
peri: impl Peripheral<P = T> + 'd,
|
|
g1: Option<PinGroup<'d, T, G1>>,
|
|
g2: Option<PinGroup<'d, T, G2>>,
|
|
g3: Option<PinGroup<'d, T, G3>>,
|
|
g4: Option<PinGroup<'d, T, G4>>,
|
|
g5: Option<PinGroup<'d, T, G5>>,
|
|
g6: Option<PinGroup<'d, T, G6>>,
|
|
#[cfg(any(tsc_v2, tsc_v3))] g7: Option<PinGroup<'d, T, G7>>,
|
|
#[cfg(tsc_v3)] g8: Option<PinGroup<'d, T, G8>>,
|
|
config: Config,
|
|
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
|
|
) -> Self {
|
|
// Need to check valid pin configuration input
|
|
let g1 = g1.filter(|b| b.check_group().is_ok());
|
|
let g2 = g2.filter(|b| b.check_group().is_ok());
|
|
let g3 = g3.filter(|b| b.check_group().is_ok());
|
|
let g4 = g4.filter(|b| b.check_group().is_ok());
|
|
let g5 = g5.filter(|b| b.check_group().is_ok());
|
|
let g6 = g6.filter(|b| b.check_group().is_ok());
|
|
#[cfg(any(tsc_v2, tsc_v3))]
|
|
let g7 = g7.filter(|b| b.check_group().is_ok());
|
|
#[cfg(tsc_v3)]
|
|
let g8 = g8.filter(|b| b.check_group().is_ok());
|
|
|
|
match Self::check_shields(
|
|
&g1,
|
|
&g2,
|
|
&g3,
|
|
&g4,
|
|
&g5,
|
|
&g6,
|
|
#[cfg(any(tsc_v2, tsc_v3))]
|
|
&g7,
|
|
#[cfg(tsc_v3)]
|
|
&g8,
|
|
) {
|
|
Ok(()) => Self::new_inner(
|
|
peri,
|
|
g1,
|
|
g2,
|
|
g3,
|
|
g4,
|
|
g5,
|
|
g6,
|
|
#[cfg(any(tsc_v2, tsc_v3))]
|
|
g7,
|
|
#[cfg(tsc_v3)]
|
|
g8,
|
|
config,
|
|
),
|
|
Err(_) => Self::new_inner(
|
|
peri,
|
|
None,
|
|
None,
|
|
None,
|
|
None,
|
|
None,
|
|
None,
|
|
#[cfg(any(tsc_v2, tsc_v3))]
|
|
None,
|
|
#[cfg(tsc_v3)]
|
|
None,
|
|
config,
|
|
),
|
|
}
|
|
}
|
|
/// Asyncronously wait for the end of an acquisition
|
|
pub async fn pend_for_acquisition(&mut self) {
|
|
poll_fn(|cx| match self.get_state() {
|
|
State::Busy => {
|
|
T::waker().register(cx.waker());
|
|
T::regs().ier().write(|w| w.set_eoaie(true));
|
|
if self.get_state() != State::Busy {
|
|
T::regs().ier().write(|w| w.set_eoaie(false));
|
|
return Poll::Ready(());
|
|
}
|
|
Poll::Pending
|
|
}
|
|
_ => {
|
|
T::regs().ier().write(|w| w.set_eoaie(false));
|
|
Poll::Ready(())
|
|
}
|
|
})
|
|
.await;
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Instance> Tsc<'d, T, Blocking> {
|
|
/// Create a Tsc instance that must be polled for completion
|
|
pub fn new_blocking(
|
|
peri: impl Peripheral<P = T> + 'd,
|
|
g1: Option<PinGroup<'d, T, G1>>,
|
|
g2: Option<PinGroup<'d, T, G2>>,
|
|
g3: Option<PinGroup<'d, T, G3>>,
|
|
g4: Option<PinGroup<'d, T, G4>>,
|
|
g5: Option<PinGroup<'d, T, G5>>,
|
|
g6: Option<PinGroup<'d, T, G6>>,
|
|
#[cfg(any(tsc_v2, tsc_v3))] g7: Option<PinGroup<'d, T, G7>>,
|
|
#[cfg(tsc_v3)] g8: Option<PinGroup<'d, T, G8>>,
|
|
config: Config,
|
|
) -> Self {
|
|
// Need to check valid pin configuration input
|
|
let g1 = g1.filter(|b| b.check_group().is_ok());
|
|
let g2 = g2.filter(|b| b.check_group().is_ok());
|
|
let g3 = g3.filter(|b| b.check_group().is_ok());
|
|
let g4 = g4.filter(|b| b.check_group().is_ok());
|
|
let g5 = g5.filter(|b| b.check_group().is_ok());
|
|
let g6 = g6.filter(|b| b.check_group().is_ok());
|
|
#[cfg(any(tsc_v2, tsc_v3))]
|
|
let g7 = g7.filter(|b| b.check_group().is_ok());
|
|
#[cfg(tsc_v3)]
|
|
let g8 = g8.filter(|b| b.check_group().is_ok());
|
|
|
|
match Self::check_shields(
|
|
&g1,
|
|
&g2,
|
|
&g3,
|
|
&g4,
|
|
&g5,
|
|
&g6,
|
|
#[cfg(any(tsc_v2, tsc_v3))]
|
|
&g7,
|
|
#[cfg(tsc_v3)]
|
|
&g8,
|
|
) {
|
|
Ok(()) => Self::new_inner(
|
|
peri,
|
|
g1,
|
|
g2,
|
|
g3,
|
|
g4,
|
|
g5,
|
|
g6,
|
|
#[cfg(any(tsc_v2, tsc_v3))]
|
|
g7,
|
|
#[cfg(tsc_v3)]
|
|
g8,
|
|
config,
|
|
),
|
|
Err(_) => Self::new_inner(
|
|
peri,
|
|
None,
|
|
None,
|
|
None,
|
|
None,
|
|
None,
|
|
None,
|
|
#[cfg(any(tsc_v2, tsc_v3))]
|
|
None,
|
|
#[cfg(tsc_v3)]
|
|
None,
|
|
config,
|
|
),
|
|
}
|
|
}
|
|
/// Wait for end of acquisition
|
|
pub fn poll_for_acquisition(&mut self) {
|
|
while self.get_state() == State::Busy {}
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Instance, K: PeriMode> Tsc<'d, T, K> {
|
|
/// Create new TSC driver
|
|
fn check_shields(
|
|
g1: &Option<PinGroup<'d, T, G1>>,
|
|
g2: &Option<PinGroup<'d, T, G2>>,
|
|
g3: &Option<PinGroup<'d, T, G3>>,
|
|
g4: &Option<PinGroup<'d, T, G4>>,
|
|
g5: &Option<PinGroup<'d, T, G5>>,
|
|
g6: &Option<PinGroup<'d, T, G6>>,
|
|
#[cfg(any(tsc_v2, tsc_v3))] g7: &Option<PinGroup<'d, T, G7>>,
|
|
#[cfg(tsc_v3)] g8: &Option<PinGroup<'d, T, G8>>,
|
|
) -> Result<(), GroupError> {
|
|
let mut shield_count = 0;
|
|
|
|
if let Some(pin_group) = g1 {
|
|
if pin_group.contains_shield() {
|
|
shield_count += 1;
|
|
}
|
|
};
|
|
if let Some(pin_group) = g2 {
|
|
if pin_group.contains_shield() {
|
|
shield_count += 1;
|
|
}
|
|
};
|
|
if let Some(pin_group) = g3 {
|
|
if pin_group.contains_shield() {
|
|
shield_count += 1;
|
|
}
|
|
};
|
|
if let Some(pin_group) = g4 {
|
|
if pin_group.contains_shield() {
|
|
shield_count += 1;
|
|
}
|
|
};
|
|
if let Some(pin_group) = g5 {
|
|
if pin_group.contains_shield() {
|
|
shield_count += 1;
|
|
}
|
|
};
|
|
if let Some(pin_group) = g6 {
|
|
if pin_group.contains_shield() {
|
|
shield_count += 1;
|
|
}
|
|
};
|
|
#[cfg(any(tsc_v2, tsc_v3))]
|
|
if let Some(pin_group) = g7 {
|
|
if pin_group.contains_shield() {
|
|
shield_count += 1;
|
|
}
|
|
};
|
|
#[cfg(tsc_v3)]
|
|
if let Some(pin_group) = g8 {
|
|
if pin_group.contains_shield() {
|
|
shield_count += 1;
|
|
}
|
|
};
|
|
|
|
if shield_count > 1 {
|
|
return Err(GroupError::ChannelShield);
|
|
}
|
|
|
|
Ok(())
|
|
}
|
|
|
|
fn extract_groups(io_mask: u32) -> u32 {
|
|
let mut groups: u32 = 0;
|
|
for idx in 0..TSC_NUM_GROUPS {
|
|
if io_mask & (0x0F << idx * 4) != 0 {
|
|
groups |= 1 << idx
|
|
}
|
|
}
|
|
groups
|
|
}
|
|
|
|
fn new_inner(
|
|
peri: impl Peripheral<P = T> + 'd,
|
|
g1: Option<PinGroup<'d, T, G1>>,
|
|
g2: Option<PinGroup<'d, T, G2>>,
|
|
g3: Option<PinGroup<'d, T, G3>>,
|
|
g4: Option<PinGroup<'d, T, G4>>,
|
|
g5: Option<PinGroup<'d, T, G5>>,
|
|
g6: Option<PinGroup<'d, T, G6>>,
|
|
#[cfg(any(tsc_v2, tsc_v3))] g7: Option<PinGroup<'d, T, G7>>,
|
|
#[cfg(tsc_v3)] g8: Option<PinGroup<'d, T, G8>>,
|
|
config: Config,
|
|
) -> Self {
|
|
into_ref!(peri);
|
|
|
|
rcc::enable_and_reset::<T>();
|
|
|
|
T::regs().cr().modify(|w| {
|
|
w.set_tsce(true);
|
|
w.set_ctph(config.ct_pulse_high_length.into());
|
|
w.set_ctpl(config.ct_pulse_low_length.into());
|
|
w.set_sse(config.spread_spectrum);
|
|
// Prevent invalid configuration for pulse generator prescaler
|
|
if config.ct_pulse_low_length == ChargeTransferPulseCycle::_1
|
|
&& (config.pulse_generator_prescaler == PGPrescalerDivider::_1
|
|
|| config.pulse_generator_prescaler == PGPrescalerDivider::_2)
|
|
{
|
|
w.set_pgpsc(PGPrescalerDivider::_4.into());
|
|
} else if config.ct_pulse_low_length == ChargeTransferPulseCycle::_2
|
|
&& config.pulse_generator_prescaler == PGPrescalerDivider::_1
|
|
{
|
|
w.set_pgpsc(PGPrescalerDivider::_2.into());
|
|
} else {
|
|
w.set_pgpsc(config.pulse_generator_prescaler.into());
|
|
}
|
|
w.set_ssd(config.spread_spectrum_deviation.into());
|
|
w.set_sspsc(config.spread_spectrum_prescaler);
|
|
|
|
w.set_mcv(config.max_count_value.into());
|
|
w.set_syncpol(config.synchro_pin_polarity);
|
|
w.set_am(config.acquisition_mode);
|
|
});
|
|
|
|
// Set IO configuration
|
|
// Disable Schmitt trigger hysteresis on all used TSC IOs
|
|
T::regs()
|
|
.iohcr()
|
|
.write(|w| w.0 = !(config.channel_ios | config.shield_ios | config.sampling_ios));
|
|
|
|
// Set channel and shield IOs
|
|
T::regs()
|
|
.ioccr()
|
|
.write(|w| w.0 = config.channel_ios | config.shield_ios);
|
|
|
|
// Set sampling IOs
|
|
T::regs().ioscr().write(|w| w.0 = config.sampling_ios);
|
|
|
|
// Set the groups to be acquired
|
|
T::regs()
|
|
.iogcsr()
|
|
.write(|w| w.0 = Self::extract_groups(config.channel_ios));
|
|
|
|
// Disable interrupts
|
|
T::regs().ier().modify(|w| {
|
|
w.set_eoaie(false);
|
|
w.set_mceie(false);
|
|
});
|
|
|
|
// Clear flags
|
|
T::regs().icr().modify(|w| {
|
|
w.set_eoaic(true);
|
|
w.set_mceic(true);
|
|
});
|
|
|
|
unsafe {
|
|
T::Interrupt::enable();
|
|
}
|
|
|
|
Self {
|
|
_peri: peri,
|
|
_g1: g1,
|
|
_g2: g2,
|
|
_g3: g3,
|
|
_g4: g4,
|
|
_g5: g5,
|
|
_g6: g6,
|
|
#[cfg(any(tsc_v2, tsc_v3))]
|
|
_g7: g7,
|
|
#[cfg(tsc_v3)]
|
|
_g8: g8,
|
|
state: State::Ready,
|
|
config,
|
|
_kind: PhantomData,
|
|
}
|
|
}
|
|
|
|
/// Start charge transfer acquisition
|
|
pub fn start(&mut self) {
|
|
self.state = State::Busy;
|
|
|
|
// Disable interrupts
|
|
T::regs().ier().modify(|w| {
|
|
w.set_eoaie(false);
|
|
w.set_mceie(false);
|
|
});
|
|
|
|
// Clear flags
|
|
T::regs().icr().modify(|w| {
|
|
w.set_eoaic(true);
|
|
w.set_mceic(true);
|
|
});
|
|
|
|
// Set the touch sensing IOs not acquired to the default mode
|
|
T::regs().cr().modify(|w| {
|
|
w.set_iodef(self.config.io_default_mode);
|
|
});
|
|
|
|
// Start the acquisition
|
|
T::regs().cr().modify(|w| {
|
|
w.set_start(true);
|
|
});
|
|
}
|
|
|
|
/// Stop charge transfer acquisition
|
|
pub fn stop(&mut self) {
|
|
T::regs().cr().modify(|w| {
|
|
w.set_start(false);
|
|
});
|
|
|
|
// Set the touch sensing IOs in low power mode
|
|
T::regs().cr().modify(|w| {
|
|
w.set_iodef(false);
|
|
});
|
|
|
|
// Clear flags
|
|
T::regs().icr().modify(|w| {
|
|
w.set_eoaic(true);
|
|
w.set_mceic(true);
|
|
});
|
|
|
|
self.state = State::Ready;
|
|
}
|
|
|
|
/// Get current state of acquisition
|
|
pub fn get_state(&mut self) -> State {
|
|
if self.state == State::Busy {
|
|
if T::regs().isr().read().eoaf() {
|
|
if T::regs().isr().read().mcef() {
|
|
self.state = State::Error
|
|
} else {
|
|
self.state = State::Ready
|
|
}
|
|
}
|
|
}
|
|
self.state
|
|
}
|
|
|
|
/// Get the individual group status to check acquisition complete
|
|
pub fn group_get_status(&mut self, index: Group) -> GroupStatus {
|
|
// Status bits are set by hardware when the acquisition on the corresponding
|
|
// enabled analog IO group is complete, cleared when new acquisition is started
|
|
let status = match index {
|
|
Group::One => T::regs().iogcsr().read().g1s(),
|
|
Group::Two => T::regs().iogcsr().read().g2s(),
|
|
Group::Three => T::regs().iogcsr().read().g3s(),
|
|
Group::Four => T::regs().iogcsr().read().g4s(),
|
|
Group::Five => T::regs().iogcsr().read().g5s(),
|
|
Group::Six => T::regs().iogcsr().read().g6s(),
|
|
#[cfg(any(tsc_v2, tsc_v3))]
|
|
Group::Seven => T::regs().iogcsr().read().g7s(),
|
|
#[cfg(tsc_v3)]
|
|
Group::Eight => T::regs().iogcsr().read().g8s(),
|
|
};
|
|
match status {
|
|
true => GroupStatus::Complete,
|
|
false => GroupStatus::Ongoing,
|
|
}
|
|
}
|
|
|
|
/// Get the count for the acquisiton, valid once group status is set
|
|
pub fn group_get_value(&mut self, index: Group) -> u16 {
|
|
T::regs().iogcr(index.into()).read().cnt()
|
|
}
|
|
|
|
/// Discharge the IOs for subsequent acquisition
|
|
pub fn discharge_io(&mut self, status: bool) {
|
|
// Set the touch sensing IOs in low power mode
|
|
T::regs().cr().modify(|w| {
|
|
w.set_iodef(!status);
|
|
});
|
|
}
|
|
}
|
|
|
|
impl<'d, T: Instance, K: PeriMode> Drop for Tsc<'d, T, K> {
|
|
fn drop(&mut self) {
|
|
rcc::disable::<T>();
|
|
}
|
|
}
|
|
|
|
pub(crate) trait SealedInstance {
|
|
fn regs() -> crate::pac::tsc::Tsc;
|
|
fn waker() -> &'static AtomicWaker;
|
|
}
|
|
|
|
/// TSC instance trait
|
|
#[allow(private_bounds)]
|
|
pub trait Instance: Peripheral<P = Self> + SealedInstance + RccPeripheral {
|
|
/// Interrupt for this TSC instance
|
|
type Interrupt: interrupt::typelevel::Interrupt;
|
|
}
|
|
|
|
foreach_interrupt!(
|
|
($inst:ident, tsc, TSC, GLOBAL, $irq:ident) => {
|
|
impl Instance for peripherals::$inst {
|
|
type Interrupt = crate::interrupt::typelevel::$irq;
|
|
}
|
|
|
|
impl SealedInstance for peripherals::$inst {
|
|
fn regs() -> crate::pac::tsc::Tsc {
|
|
crate::pac::$inst
|
|
}
|
|
fn waker() -> &'static AtomicWaker {
|
|
static WAKER: AtomicWaker = AtomicWaker::new();
|
|
&WAKER
|
|
}
|
|
}
|
|
};
|
|
);
|
|
|
|
pin_trait!(G1IO1Pin, Instance);
|
|
pin_trait!(G1IO2Pin, Instance);
|
|
pin_trait!(G1IO3Pin, Instance);
|
|
pin_trait!(G1IO4Pin, Instance);
|
|
pin_trait!(G2IO1Pin, Instance);
|
|
pin_trait!(G2IO2Pin, Instance);
|
|
pin_trait!(G2IO3Pin, Instance);
|
|
pin_trait!(G2IO4Pin, Instance);
|
|
pin_trait!(G3IO1Pin, Instance);
|
|
pin_trait!(G3IO2Pin, Instance);
|
|
pin_trait!(G3IO3Pin, Instance);
|
|
pin_trait!(G3IO4Pin, Instance);
|
|
pin_trait!(G4IO1Pin, Instance);
|
|
pin_trait!(G4IO2Pin, Instance);
|
|
pin_trait!(G4IO3Pin, Instance);
|
|
pin_trait!(G4IO4Pin, Instance);
|
|
pin_trait!(G5IO1Pin, Instance);
|
|
pin_trait!(G5IO2Pin, Instance);
|
|
pin_trait!(G5IO3Pin, Instance);
|
|
pin_trait!(G5IO4Pin, Instance);
|
|
pin_trait!(G6IO1Pin, Instance);
|
|
pin_trait!(G6IO2Pin, Instance);
|
|
pin_trait!(G6IO3Pin, Instance);
|
|
pin_trait!(G6IO4Pin, Instance);
|
|
pin_trait!(G7IO1Pin, Instance);
|
|
pin_trait!(G7IO2Pin, Instance);
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pin_trait!(G7IO3Pin, Instance);
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pin_trait!(G7IO4Pin, Instance);
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pin_trait!(G8IO1Pin, Instance);
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pin_trait!(G8IO2Pin, Instance);
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pin_trait!(G8IO3Pin, Instance);
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pin_trait!(G8IO4Pin, Instance);
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