2023-11-29 16:23:48 +00:00
|
|
|
use core::convert::Infallible;
|
2021-08-19 20:17:17 +00:00
|
|
|
use core::future::Future;
|
|
|
|
use core::marker::PhantomData;
|
|
|
|
use core::pin::Pin;
|
|
|
|
use core::task::{Context, Poll};
|
2022-06-12 20:15:44 +00:00
|
|
|
|
2023-07-28 11:23:22 +00:00
|
|
|
use embassy_hal_internal::impl_peripheral;
|
2022-08-22 19:46:09 +00:00
|
|
|
use embassy_sync::waitqueue::AtomicWaker;
|
2021-08-19 20:17:17 +00:00
|
|
|
|
2023-09-19 21:23:14 +00:00
|
|
|
use crate::gpio::{AnyPin, Input, Level, Pin as GpioPin};
|
2021-07-30 20:48:13 +00:00
|
|
|
use crate::pac::exti::regs::Lines;
|
|
|
|
use crate::pac::EXTI;
|
2022-07-23 12:00:19 +00:00
|
|
|
use crate::{interrupt, pac, peripherals, Peripheral};
|
2021-08-19 20:17:17 +00:00
|
|
|
|
|
|
|
const EXTI_COUNT: usize = 16;
|
|
|
|
const NEW_AW: AtomicWaker = AtomicWaker::new();
|
|
|
|
static EXTI_WAKERS: [AtomicWaker; EXTI_COUNT] = [NEW_AW; EXTI_COUNT];
|
|
|
|
|
|
|
|
#[cfg(exti_w)]
|
|
|
|
fn cpu_regs() -> pac::exti::Cpu {
|
|
|
|
EXTI.cpu(crate::pac::CORE_INDEX)
|
|
|
|
}
|
|
|
|
|
|
|
|
#[cfg(not(exti_w))]
|
|
|
|
fn cpu_regs() -> pac::exti::Exti {
|
|
|
|
EXTI
|
|
|
|
}
|
|
|
|
|
2023-04-06 16:53:51 +00:00
|
|
|
#[cfg(not(any(exti_c0, exti_g0, exti_l5, gpio_v1, exti_u5, exti_h5, exti_h50)))]
|
2021-07-30 20:48:13 +00:00
|
|
|
fn exticr_regs() -> pac::syscfg::Syscfg {
|
|
|
|
pac::SYSCFG
|
|
|
|
}
|
2023-04-06 16:53:51 +00:00
|
|
|
#[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))]
|
2021-07-30 20:48:13 +00:00
|
|
|
fn exticr_regs() -> pac::exti::Exti {
|
|
|
|
EXTI
|
|
|
|
}
|
2021-09-26 15:08:22 +00:00
|
|
|
#[cfg(gpio_v1)]
|
|
|
|
fn exticr_regs() -> pac::afio::Afio {
|
|
|
|
pac::AFIO
|
|
|
|
}
|
2021-07-30 20:48:13 +00:00
|
|
|
|
2023-12-17 21:09:14 +00:00
|
|
|
unsafe fn on_irq() {
|
2023-09-15 23:41:33 +00:00
|
|
|
#[cfg(feature = "low-power")]
|
|
|
|
crate::low_power::on_wakeup_irq();
|
|
|
|
|
2023-04-06 16:53:51 +00:00
|
|
|
#[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50)))]
|
2021-07-30 20:48:13 +00:00
|
|
|
let bits = EXTI.pr(0).read().0;
|
2023-04-06 16:53:51 +00:00
|
|
|
#[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))]
|
2021-07-30 20:48:13 +00:00
|
|
|
let bits = EXTI.rpr(0).read().0 | EXTI.fpr(0).read().0;
|
2021-08-19 20:17:17 +00:00
|
|
|
|
2023-11-01 03:36:54 +00:00
|
|
|
// We don't handle or change any EXTI lines above 16.
|
|
|
|
let bits = bits & 0x0000FFFF;
|
|
|
|
|
2021-08-19 20:17:17 +00:00
|
|
|
// Mask all the channels that fired.
|
2021-07-30 20:48:13 +00:00
|
|
|
cpu_regs().imr(0).modify(|w| w.0 &= !bits);
|
2021-08-19 20:17:17 +00:00
|
|
|
|
|
|
|
// Wake the tasks
|
2021-07-30 20:48:13 +00:00
|
|
|
for pin in BitIter(bits) {
|
2021-08-19 20:17:17 +00:00
|
|
|
EXTI_WAKERS[pin as usize].wake();
|
|
|
|
}
|
|
|
|
|
|
|
|
// Clear pending
|
2023-04-06 16:53:51 +00:00
|
|
|
#[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50)))]
|
2021-07-30 20:48:13 +00:00
|
|
|
EXTI.pr(0).write_value(Lines(bits));
|
2023-04-06 16:53:51 +00:00
|
|
|
#[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))]
|
2021-07-30 20:48:13 +00:00
|
|
|
{
|
|
|
|
EXTI.rpr(0).write_value(Lines(bits));
|
|
|
|
EXTI.fpr(0).write_value(Lines(bits));
|
|
|
|
}
|
2021-08-19 20:17:17 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
struct BitIter(u32);
|
|
|
|
|
|
|
|
impl Iterator for BitIter {
|
|
|
|
type Item = u32;
|
|
|
|
|
|
|
|
fn next(&mut self) -> Option<Self::Item> {
|
|
|
|
match self.0.trailing_zeros() {
|
|
|
|
32 => None,
|
|
|
|
b => {
|
|
|
|
self.0 &= !(1 << b);
|
|
|
|
Some(b)
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-12-17 21:09:14 +00:00
|
|
|
/// EXTI input driver.
|
|
|
|
///
|
|
|
|
/// This driver augments a GPIO `Input` with EXTI functionality. EXTI is not
|
|
|
|
/// built into `Input` itself because it needs to take ownership of the corresponding
|
|
|
|
/// EXTI channel, which is a limited resource.
|
|
|
|
///
|
|
|
|
/// Pins PA5, PB5, PC5... all use EXTI channel 5, so you can't use EXTI on, say, PA5 and PC5 at the same time.
|
2021-08-19 20:17:17 +00:00
|
|
|
pub struct ExtiInput<'d, T: GpioPin> {
|
|
|
|
pin: Input<'d, T>,
|
|
|
|
}
|
|
|
|
|
|
|
|
impl<'d, T: GpioPin> Unpin for ExtiInput<'d, T> {}
|
|
|
|
|
|
|
|
impl<'d, T: GpioPin> ExtiInput<'d, T> {
|
2023-12-17 21:09:14 +00:00
|
|
|
/// Create an EXTI input.
|
2022-07-23 12:00:19 +00:00
|
|
|
pub fn new(pin: Input<'d, T>, _ch: impl Peripheral<P = T::ExtiChannel> + 'd) -> Self {
|
2021-08-19 20:17:17 +00:00
|
|
|
Self { pin }
|
|
|
|
}
|
2022-01-14 21:02:00 +00:00
|
|
|
|
2023-12-17 21:09:14 +00:00
|
|
|
/// Get whether the pin is high.
|
2023-12-14 15:01:51 +00:00
|
|
|
pub fn is_high(&mut self) -> bool {
|
2022-01-14 21:02:00 +00:00
|
|
|
self.pin.is_high()
|
|
|
|
}
|
|
|
|
|
2023-12-17 21:09:14 +00:00
|
|
|
/// Get whether the pin is low.
|
2023-12-14 15:01:51 +00:00
|
|
|
pub fn is_low(&mut self) -> bool {
|
2022-01-14 21:02:00 +00:00
|
|
|
self.pin.is_low()
|
|
|
|
}
|
2022-01-14 21:10:24 +00:00
|
|
|
|
2023-12-17 21:09:14 +00:00
|
|
|
/// Get the pin level.
|
2023-12-14 15:01:51 +00:00
|
|
|
pub fn get_level(&mut self) -> Level {
|
2023-09-19 21:23:14 +00:00
|
|
|
self.pin.get_level()
|
|
|
|
}
|
|
|
|
|
2023-12-17 21:09:14 +00:00
|
|
|
/// Asynchronously wait until the pin is high.
|
|
|
|
///
|
|
|
|
/// This returns immediately if the pin is already high.
|
|
|
|
pub async fn wait_for_high(&mut self) {
|
2022-07-10 18:55:04 +00:00
|
|
|
let fut = ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), true, false);
|
2022-01-14 21:22:38 +00:00
|
|
|
if self.is_high() {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
fut.await
|
|
|
|
}
|
|
|
|
|
2023-12-17 21:09:14 +00:00
|
|
|
/// Asynchronously wait until the pin is low.
|
|
|
|
///
|
|
|
|
/// This returns immediately if the pin is already low.
|
|
|
|
pub async fn wait_for_low(&mut self) {
|
2022-07-10 18:55:04 +00:00
|
|
|
let fut = ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), false, true);
|
2022-01-14 21:22:38 +00:00
|
|
|
if self.is_low() {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
fut.await
|
|
|
|
}
|
|
|
|
|
2023-12-17 21:09:14 +00:00
|
|
|
/// Asynchronously wait until the pin sees a rising edge.
|
|
|
|
///
|
|
|
|
/// If the pin is already high, it will wait for it to go low then back high.
|
|
|
|
pub async fn wait_for_rising_edge(&mut self) {
|
2022-07-10 18:55:04 +00:00
|
|
|
ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), true, false).await
|
2022-01-14 21:10:24 +00:00
|
|
|
}
|
|
|
|
|
2023-12-17 21:09:14 +00:00
|
|
|
/// Asynchronously wait until the pin sees a falling edge.
|
|
|
|
///
|
|
|
|
/// If the pin is already low, it will wait for it to go high then back low.
|
|
|
|
pub async fn wait_for_falling_edge(&mut self) {
|
2022-07-10 18:55:04 +00:00
|
|
|
ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), false, true).await
|
2022-01-14 21:10:24 +00:00
|
|
|
}
|
|
|
|
|
2023-12-17 21:09:14 +00:00
|
|
|
/// Asynchronously wait until the pin sees any edge (either rising or falling).
|
|
|
|
pub async fn wait_for_any_edge(&mut self) {
|
2022-07-10 18:55:04 +00:00
|
|
|
ExtiInputFuture::new(self.pin.pin.pin.pin(), self.pin.pin.pin.port(), true, true).await
|
2022-01-14 21:10:24 +00:00
|
|
|
}
|
2021-08-19 20:17:17 +00:00
|
|
|
}
|
|
|
|
|
2023-11-29 16:23:48 +00:00
|
|
|
impl<'d, T: GpioPin> embedded_hal_02::digital::v2::InputPin for ExtiInput<'d, T> {
|
|
|
|
type Error = Infallible;
|
2021-08-19 20:17:17 +00:00
|
|
|
|
2023-11-29 16:23:48 +00:00
|
|
|
fn is_high(&self) -> Result<bool, Self::Error> {
|
2023-12-14 15:01:51 +00:00
|
|
|
Ok(!self.pin.pin.ref_is_low())
|
2023-11-29 16:23:48 +00:00
|
|
|
}
|
2021-08-19 20:17:17 +00:00
|
|
|
|
2023-11-29 16:23:48 +00:00
|
|
|
fn is_low(&self) -> Result<bool, Self::Error> {
|
2023-12-14 15:01:51 +00:00
|
|
|
Ok(self.pin.pin.ref_is_low())
|
2021-08-19 20:17:17 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-11-29 16:23:48 +00:00
|
|
|
impl<'d, T: GpioPin> embedded_hal_1::digital::ErrorType for ExtiInput<'d, T> {
|
|
|
|
type Error = Infallible;
|
|
|
|
}
|
2022-06-12 20:15:44 +00:00
|
|
|
|
2023-11-29 16:23:48 +00:00
|
|
|
impl<'d, T: GpioPin> embedded_hal_1::digital::InputPin for ExtiInput<'d, T> {
|
2023-12-14 15:01:51 +00:00
|
|
|
fn is_high(&mut self) -> Result<bool, Self::Error> {
|
2023-11-29 16:23:48 +00:00
|
|
|
Ok(self.is_high())
|
2022-01-14 21:22:38 +00:00
|
|
|
}
|
|
|
|
|
2023-12-14 15:01:51 +00:00
|
|
|
fn is_low(&mut self) -> Result<bool, Self::Error> {
|
2023-11-29 16:23:48 +00:00
|
|
|
Ok(self.is_low())
|
2022-01-14 21:22:38 +00:00
|
|
|
}
|
2022-02-12 01:26:15 +00:00
|
|
|
}
|
2022-01-14 21:22:38 +00:00
|
|
|
|
2023-11-29 16:23:48 +00:00
|
|
|
impl<'d, T: GpioPin> embedded_hal_async::digital::Wait for ExtiInput<'d, T> {
|
|
|
|
async fn wait_for_high(&mut self) -> Result<(), Self::Error> {
|
|
|
|
self.wait_for_high().await;
|
|
|
|
Ok(())
|
|
|
|
}
|
2021-08-19 20:17:17 +00:00
|
|
|
|
2023-11-29 16:23:48 +00:00
|
|
|
async fn wait_for_low(&mut self) -> Result<(), Self::Error> {
|
|
|
|
self.wait_for_low().await;
|
|
|
|
Ok(())
|
|
|
|
}
|
2022-01-26 21:39:06 +00:00
|
|
|
|
2023-11-29 16:23:48 +00:00
|
|
|
async fn wait_for_rising_edge(&mut self) -> Result<(), Self::Error> {
|
|
|
|
self.wait_for_rising_edge().await;
|
|
|
|
Ok(())
|
|
|
|
}
|
2021-08-19 20:17:17 +00:00
|
|
|
|
2023-11-29 16:23:48 +00:00
|
|
|
async fn wait_for_falling_edge(&mut self) -> Result<(), Self::Error> {
|
|
|
|
self.wait_for_falling_edge().await;
|
|
|
|
Ok(())
|
|
|
|
}
|
2022-01-26 21:39:06 +00:00
|
|
|
|
2023-11-29 16:23:48 +00:00
|
|
|
async fn wait_for_any_edge(&mut self) -> Result<(), Self::Error> {
|
|
|
|
self.wait_for_any_edge().await;
|
|
|
|
Ok(())
|
2021-08-19 20:17:17 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-02-24 19:01:41 +00:00
|
|
|
#[must_use = "futures do nothing unless you `.await` or poll them"]
|
2022-01-14 21:10:24 +00:00
|
|
|
struct ExtiInputFuture<'a> {
|
2021-08-19 20:17:17 +00:00
|
|
|
pin: u8,
|
|
|
|
phantom: PhantomData<&'a mut AnyPin>,
|
|
|
|
}
|
|
|
|
|
|
|
|
impl<'a> ExtiInputFuture<'a> {
|
|
|
|
fn new(pin: u8, port: u8, rising: bool, falling: bool) -> Self {
|
2023-06-19 01:07:26 +00:00
|
|
|
critical_section::with(|_| {
|
2021-08-19 20:17:17 +00:00
|
|
|
let pin = pin as usize;
|
2022-06-12 20:15:44 +00:00
|
|
|
exticr_regs().exticr(pin / 4).modify(|w| w.set_exti(pin % 4, port));
|
2021-08-19 20:17:17 +00:00
|
|
|
EXTI.rtsr(0).modify(|w| w.set_line(pin, rising));
|
|
|
|
EXTI.ftsr(0).modify(|w| w.set_line(pin, falling));
|
2021-07-30 20:48:13 +00:00
|
|
|
|
|
|
|
// clear pending bit
|
2023-04-06 16:53:51 +00:00
|
|
|
#[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50)))]
|
2021-07-30 20:48:13 +00:00
|
|
|
EXTI.pr(0).write(|w| w.set_line(pin, true));
|
2023-04-06 16:53:51 +00:00
|
|
|
#[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))]
|
2021-07-30 20:48:13 +00:00
|
|
|
{
|
|
|
|
EXTI.rpr(0).write(|w| w.set_line(pin, true));
|
|
|
|
EXTI.fpr(0).write(|w| w.set_line(pin, true));
|
|
|
|
}
|
|
|
|
|
2021-08-19 20:17:17 +00:00
|
|
|
cpu_regs().imr(0).modify(|w| w.set_line(pin, true));
|
|
|
|
});
|
|
|
|
|
|
|
|
Self {
|
|
|
|
pin,
|
|
|
|
phantom: PhantomData,
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl<'a> Drop for ExtiInputFuture<'a> {
|
|
|
|
fn drop(&mut self) {
|
2023-06-19 01:07:26 +00:00
|
|
|
critical_section::with(|_| {
|
2021-08-19 20:17:17 +00:00
|
|
|
let pin = self.pin as _;
|
|
|
|
cpu_regs().imr(0).modify(|w| w.set_line(pin, false));
|
|
|
|
});
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
impl<'a> Future for ExtiInputFuture<'a> {
|
|
|
|
type Output = ();
|
|
|
|
|
|
|
|
fn poll(self: Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> {
|
|
|
|
EXTI_WAKERS[self.pin as usize].register(cx.waker());
|
|
|
|
|
2023-06-19 01:07:26 +00:00
|
|
|
let imr = cpu_regs().imr(0).read();
|
2021-08-19 20:17:17 +00:00
|
|
|
if !imr.line(self.pin as _) {
|
|
|
|
Poll::Ready(())
|
|
|
|
} else {
|
|
|
|
Poll::Pending
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
macro_rules! foreach_exti_irq {
|
|
|
|
($action:ident) => {
|
2022-02-26 00:40:43 +00:00
|
|
|
foreach_interrupt!(
|
2021-08-19 20:17:17 +00:00
|
|
|
(EXTI0) => { $action!(EXTI0); };
|
|
|
|
(EXTI1) => { $action!(EXTI1); };
|
|
|
|
(EXTI2) => { $action!(EXTI2); };
|
|
|
|
(EXTI3) => { $action!(EXTI3); };
|
|
|
|
(EXTI4) => { $action!(EXTI4); };
|
|
|
|
(EXTI5) => { $action!(EXTI5); };
|
|
|
|
(EXTI6) => { $action!(EXTI6); };
|
|
|
|
(EXTI7) => { $action!(EXTI7); };
|
|
|
|
(EXTI8) => { $action!(EXTI8); };
|
|
|
|
(EXTI9) => { $action!(EXTI9); };
|
|
|
|
(EXTI10) => { $action!(EXTI10); };
|
|
|
|
(EXTI11) => { $action!(EXTI11); };
|
|
|
|
(EXTI12) => { $action!(EXTI12); };
|
|
|
|
(EXTI13) => { $action!(EXTI13); };
|
|
|
|
(EXTI14) => { $action!(EXTI14); };
|
|
|
|
(EXTI15) => { $action!(EXTI15); };
|
|
|
|
|
|
|
|
// plus the weird ones
|
|
|
|
(EXTI0_1) => { $action!( EXTI0_1 ); };
|
|
|
|
(EXTI15_10) => { $action!(EXTI15_10); };
|
|
|
|
(EXTI15_4) => { $action!(EXTI15_4); };
|
|
|
|
(EXTI1_0) => { $action!(EXTI1_0); };
|
|
|
|
(EXTI2_3) => { $action!(EXTI2_3); };
|
|
|
|
(EXTI2_TSC) => { $action!(EXTI2_TSC); };
|
|
|
|
(EXTI3_2) => { $action!(EXTI3_2); };
|
|
|
|
(EXTI4_15) => { $action!(EXTI4_15); };
|
|
|
|
(EXTI9_5) => { $action!(EXTI9_5); };
|
|
|
|
);
|
|
|
|
};
|
|
|
|
}
|
|
|
|
|
|
|
|
macro_rules! impl_irq {
|
|
|
|
($e:ident) => {
|
2023-12-17 21:09:14 +00:00
|
|
|
#[allow(non_snake_case)]
|
2023-06-08 16:00:19 +00:00
|
|
|
#[cfg(feature = "rt")]
|
2021-08-19 20:17:17 +00:00
|
|
|
#[interrupt]
|
|
|
|
unsafe fn $e() {
|
|
|
|
on_irq()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
}
|
|
|
|
|
|
|
|
foreach_exti_irq!(impl_irq);
|
|
|
|
|
|
|
|
pub(crate) mod sealed {
|
|
|
|
pub trait Channel {}
|
|
|
|
}
|
|
|
|
|
2023-12-17 21:09:14 +00:00
|
|
|
/// EXTI channel trait.
|
2021-08-19 20:17:17 +00:00
|
|
|
pub trait Channel: sealed::Channel + Sized {
|
2023-12-17 21:09:14 +00:00
|
|
|
/// Get the EXTI channel number.
|
2021-08-19 20:17:17 +00:00
|
|
|
fn number(&self) -> usize;
|
2023-12-17 21:09:14 +00:00
|
|
|
|
|
|
|
/// Type-erase (degrade) this channel into an `AnyChannel`.
|
|
|
|
///
|
|
|
|
/// This converts EXTI channel singletons (`EXTI0`, `EXTI1`, ...), which
|
|
|
|
/// are all different types, into the same type. It is useful for
|
|
|
|
/// creating arrays of channels, or avoiding generics.
|
2021-08-19 20:17:17 +00:00
|
|
|
fn degrade(self) -> AnyChannel {
|
|
|
|
AnyChannel {
|
|
|
|
number: self.number() as u8,
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2023-12-17 21:09:14 +00:00
|
|
|
/// Type-erased (degraded) EXTI channel.
|
|
|
|
///
|
|
|
|
/// This represents ownership over any EXTI channel, known at runtime.
|
2021-08-19 20:17:17 +00:00
|
|
|
pub struct AnyChannel {
|
|
|
|
number: u8,
|
|
|
|
}
|
2023-12-17 21:09:14 +00:00
|
|
|
|
2022-07-23 12:00:19 +00:00
|
|
|
impl_peripheral!(AnyChannel);
|
2021-08-19 20:17:17 +00:00
|
|
|
impl sealed::Channel for AnyChannel {}
|
|
|
|
impl Channel for AnyChannel {
|
|
|
|
fn number(&self) -> usize {
|
|
|
|
self.number as usize
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
macro_rules! impl_exti {
|
|
|
|
($type:ident, $number:expr) => {
|
|
|
|
impl sealed::Channel for peripherals::$type {}
|
|
|
|
impl Channel for peripherals::$type {
|
|
|
|
fn number(&self) -> usize {
|
|
|
|
$number as usize
|
|
|
|
}
|
|
|
|
}
|
|
|
|
};
|
|
|
|
}
|
|
|
|
|
|
|
|
impl_exti!(EXTI0, 0);
|
|
|
|
impl_exti!(EXTI1, 1);
|
|
|
|
impl_exti!(EXTI2, 2);
|
|
|
|
impl_exti!(EXTI3, 3);
|
|
|
|
impl_exti!(EXTI4, 4);
|
|
|
|
impl_exti!(EXTI5, 5);
|
|
|
|
impl_exti!(EXTI6, 6);
|
|
|
|
impl_exti!(EXTI7, 7);
|
|
|
|
impl_exti!(EXTI8, 8);
|
|
|
|
impl_exti!(EXTI9, 9);
|
|
|
|
impl_exti!(EXTI10, 10);
|
|
|
|
impl_exti!(EXTI11, 11);
|
|
|
|
impl_exti!(EXTI12, 12);
|
|
|
|
impl_exti!(EXTI13, 13);
|
|
|
|
impl_exti!(EXTI14, 14);
|
|
|
|
impl_exti!(EXTI15, 15);
|
|
|
|
|
|
|
|
macro_rules! enable_irq {
|
|
|
|
($e:ident) => {
|
2023-06-08 14:08:40 +00:00
|
|
|
crate::interrupt::typelevel::$e::enable();
|
2021-08-19 20:17:17 +00:00
|
|
|
};
|
|
|
|
}
|
|
|
|
|
|
|
|
/// safety: must be called only once
|
2023-10-11 22:34:47 +00:00
|
|
|
pub(crate) unsafe fn init(_cs: critical_section::CriticalSection) {
|
2023-06-08 14:08:40 +00:00
|
|
|
use crate::interrupt::typelevel::Interrupt;
|
2021-08-19 20:17:17 +00:00
|
|
|
|
|
|
|
foreach_exti_irq!(enable_irq);
|
|
|
|
}
|