Commit graph

926 commits

Author SHA1 Message Date
Rasmus Melchior Jacobsen
47a0769fc2 Let repeated clock byte be singular pointer and not array pointer 2022-12-23 15:49:22 +01:00
Rasmus Melchior Jacobsen
e9a2c4a9e3 Let start_write_repeated accept pointer instead of slice 2022-12-23 15:40:09 +01:00
Rasmus Melchior Jacobsen
662bb5797f fix(stm32): Ensure that gpio speed is VeryHigh for all spi versions
This fixes #1095
2022-12-23 09:34:42 +01:00
Rasmus Melchior Jacobsen
2457fcaa35 fix(stm32): Align with updated dma::write_repeated signature 2022-12-23 09:33:34 +01:00
Rasmus Melchior Jacobsen
da9ee83756 fix(stm32): Fix write buffer lifetime for repeated writes 2022-12-23 09:32:18 +01:00
Dario Nieuwenhuis
5eae295c8a stm32: rename feature net to embassy-net.
The eth code is always built and available, but has no own API (other
than the embassy-net Device impl) to rx/tx packets. We could add this
API in the future, so the feature only means "embassy-net support".
2022-12-13 16:43:25 +01:00
Dario Nieuwenhuis
3005ee0178 stm32/eth_v2: update to new embassy-net trait, remove PeripheralMutex. 2022-12-13 16:43:25 +01:00
Dario Nieuwenhuis
8f30652109 stm32/eth_v1: update to new embassy-net trait, remove PeripheralMutex. 2022-12-13 16:43:25 +01:00
Vincent Stakenburg
236d104844 embassy-stm32: add rs485 driver enable to uart 2022-12-09 14:26:09 +01:00
chemicstry
7bda01ec24 Fix comment 2022-12-06 23:31:58 +02:00
chemicstry
ef2b83cc03 Reset sdmmc clock on card init 2022-12-06 16:36:07 +02:00
bors[bot]
9f854110f2
Merge #1082 #1083
1082: stm32: Add basic support for DMA priority settings r=lulf a=matoushybl

This adds very basic support for specifying priority for DMA interrupts. Unfortunately, the patch now doesn't allow for specifying different priorities for DMA1/DMA2, or BDMA1/BDMA2, which I didn't know how to support.

1083: stm32: Fix H7 unaligned erase r=lulf a=matoushybl

This PR simplifies erasing sectors on the H7, which was buggy.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-12-01 13:49:59 +00:00
bors[bot]
d8ea297d6a
Merge #1088
1088: stm32: Enable fifo for buffered uart r=lulf a=matoushybl

This PR enables fifo for buffered uart where it is available. This should hopfully get rid of some overrun errors. I tried it in my application where it worked, but more intensive testing is probably required.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-12-01 13:34:52 +00:00
Matous Hybl
e1d7d8d841 stm32: Enable fifo for buffered uart 2022-11-30 22:17:51 +01:00
Guillaume MICHEL
e0ea5dfdb2 embassy-stm32: Allow SPI with DMA to implement blocking embbeded-hal traits 2022-11-30 09:26:16 +01:00
Matous Hybl
4cc0463123 stm32: Add basic support for DMA priority settings 2022-11-28 21:22:39 +01:00
Matous Hybl
2a35a09444 stm32: Fix H7 unaligned erase 2022-11-28 21:15:24 +01:00
Gabriel Smith
3ca14ba4e9 usb-driver: Remove unncessary lifetime 2022-11-27 16:28:24 -05:00
Dario Nieuwenhuis
1e2fb0459d Switch to async-fn-in-trait 2022-11-25 21:02:06 +01:00
Jaxter Kim
551b54ddcb stm32g0: Fix ADC for channels above 14 2022-11-15 12:56:47 +01:00
bors[bot]
d05979c708
Merge #1052 #1053
1052: stm32: Fix watchdog division by zero for 256 prescaler, add watchdog … r=lulf a=matoushybl

…example for H7

The problem is that `2u8.powi(8) == 0`, which causes division by zero.

1053: Disable MMC interrupts r=lulf a=matoushybl

MMC interrupts can cause firmware hangup - refer to: https://github.com/stm32-rs/stm32h7xx-hal/issues/275 for more information

Fixes #594 

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-11-11 08:04:16 +00:00
Matous Hybl
99682d313b Disable MMC interrupts
MMC interrupts can cause firmware hangup - refer to: https://github.com/stm32-rs/stm32h7xx-hal/issues/275 for more information
2022-11-10 17:21:42 +01:00
Matous Hybl
cbc97758e3 stm32: Fix watchdog division by zero for 256 prescaler, add watchdog example for H7 2022-11-10 15:56:28 +01:00
Guillaume MICHEL
1365ce6ab8 embassy-stm32: Fix bug when Uart::read future is dropped and DMA request was not stopped
fixes issue #1045

regression was introduced with PR #1031
2022-11-07 17:46:32 +01:00
bors[bot]
1f246d0e37
Merge #1034
1034: stm32/usart: Fix bug where USART idle flag could end a `read` prematuraly r=Dirbaio a=guillaume-michel

on STM32, when setting USART `detect_previous_overrun = true`, the idle flag is not cleared and could result in premature end of the `read` method.

This PR fixes that.

Co-authored-by: Guillaume MICHEL <guillaume@squaremind.io>
2022-10-28 11:22:53 +00:00
Guillaume MICHEL
49e1091309 embassy-stm32: Fix bug where USART idle flag could end a read prematuraly 2022-10-28 10:49:59 +02:00
Guillaume MICHEL
79b49c6fae embassy-stm32: remove duplicated code for USART general configuration 2022-10-28 09:32:05 +02:00
Guillaume MICHEL
f053bf742c embassy-stm32: Add support for hardware flow control for BufferedUart 2022-10-28 09:04:36 +02:00
Guillaume MICHEL
9423987ac5 embassy-stm32: Add hardware flow control constructor for UartRx and UartTx 2022-10-28 09:04:36 +02:00
Grant Miller
171b764d82 Refactor: Use PeripheralRef 2022-10-26 18:36:04 -05:00
Grant Miller
08c8022583 Refactor: Reorder _version cfgs 2022-10-26 18:04:52 -05:00
Grant Miller
4f2dcca34b Refactor: Fix v4 RccPeripheral bounds 2022-10-26 17:59:44 -05:00
Grant Miller
9c30d565b9 Refactor: Factor out Adc struct declaration 2022-10-26 17:51:12 -05:00
Grant Miller
f363f6ce92 Refactor: Don't return references to pointers 2022-10-26 17:35:06 -05:00
Grant Miller
6bf24b4d1a Refactor: Remove unused Common trait 2022-10-26 17:35:01 -05:00
Grant Miller
88bbc238b7 Set resolution directly 2022-10-26 17:07:58 -05:00
Grant Miller
2cfe2439c9 Refactor: Impl From for SampleTime and Resolution 2022-10-26 17:07:58 -05:00
Grant Miller
7b38b95e10 Refactor: Factor out Resolution 2022-10-26 17:07:58 -05:00
Grant Miller
5142674786 Fix pre-existing SampleTime typos 2022-10-26 17:07:50 -05:00
Grant Miller
a5b1d2237f Refactor: Factor out SampleTime 2022-10-26 17:06:44 -05:00
bors[bot]
7f499f3edc
Merge #1024
1024: stm32/adc: Remove voltage and temperature conversions r=Dirbaio a=GrantM11235

The current conversion utilities are confusing and a bit of a footgun. (Two out of the three examples got it wrong! They didn't measure vref at all, so all the conversions are completely wrong if vcca isn't 3.3v)

I think we should eventually have some sort of conversion utilities in the HAL, but for now I think it is best to just remove it and let the users do their own math.

cc `@chemicstry` 

Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2022-10-26 19:44:06 +00:00
bors[bot]
01e23bf9dd
Merge #1025
1025: Implement I2C timeouts, second attempt r=Dirbaio a=chemicstry

This is an alterrnative to #1022 as discussed there.

Timeouts are implemented using suggested `check_timeout: impl Fn() -> Result<(), Error>` function, which does not depend on `embassy-time` by default and is a noop for regular I2C.

This also adds `time` feature like in `embassy-nrf` to enable `embassy-time` dependencies. While at it, I also gated some other peripherals that depend on `embassy-time`, notably `usb` and (partially) `subghz`.

`TimeoutI2c` is currently only implemented for i2cv1, because i2cv2 has additional complications:
- Async methods still use a lot of busy waiting code in between DMA transfers, so simple `with_timeout()` will not work and it will have to use both types of timeouts. It could probably be rewritten to replace busy waits with IRQs, but that's outside the scope of this PR.
- I2C definition `I2c<'d, T, TXDMA, RXDMA>` is different from i2cv1 `I2c<'d, T>` making it hard to share single `TimeoutI2c` wrapper. A couple of options here:
  - Duplicate `TimeoutI2c` code
  - Add dummy `TXDMA`, `RXDMA` types to i2cv1 considering that in the future it should also support DMA

Co-authored-by: chemicstry <chemicstry@gmail.com>
2022-10-26 19:34:43 +00:00
bors[bot]
e5097a8866
Merge #959
959: Generic, executor-agnostic queue implementation r=ivmarkov a=ivmarkov

Hopefully relatively well documented.

Implementation relies on a fixed-size `SortedLinkedList` from `heapless`. (By default, for up to 128 timer schedules, but we can lower this number to - say - 64.)

As discussed earlier, on queue overflow, the `WakerRegistration` approach is utilized, whereas the waker that is ordered first in the queue is awoken to make room for the incoming one (which might be the waker that would be awoken after all!). Wakers are compared with `Waker::will_wake`, so the queue should actually not fill up that easily, if at all.

I've left provisions for the user to manually instantiate the queue using a dedicated macro - `generic_queue!` so that users willing to adjust the queue size, or users (like me) who have to use the queue in a complex "on-top-of-RTOS-but-the-timer-driver-calling-back-from-ISR" scenario can customize the mutex that protects the queue.

The one thing I'm not completely happy with is the need to call `{ embassy_time::queue::initialize() }` early on before any futures using embassy-time are polled, which is currently on the shoulders of the user. I'm open to any ideas where we can get rid of this and do it on the first call to `_embassy_time_schedule_wake`, without introducing very complex combinations of critical sections, atomics and whatnot.




Co-authored-by: ivmarkov <ivan.markov@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-10-26 19:14:12 +00:00
Guillaume MICHEL
9cac649fcf stm32: Add support for read_until_idle on UART 2022-10-26 19:06:18 +02:00
Dario Nieuwenhuis
eeb072d9cb Update Rust nightly. 2022-10-26 16:47:29 +02:00
Mathias
66611a80ca Introduce shared new_inner for uart instantiation 2022-10-26 11:51:37 +02:00
Mathias
d1eee52625 Merge branch 'master' of https://github.com/embassy-rs/embassy into embassy-stm32/uart-flowcontrol 2022-10-26 11:47:00 +02:00
chemicstry
52c03cf0a4 Add more docs 2022-10-24 22:48:40 +03:00
chemicstry
ac61e0ee9f fmt 2022-10-24 22:39:13 +03:00
chemicstry
33f75419e5 Unify i2cv1 definition with i2cv2 2022-10-24 22:34:10 +03:00