22 commits

Author	SHA1	Message	Date
Dario Nieuwenhuis	c46172acac	stm32: remove pointer-to-pointer-to-registers. ... in chiptool pacs the register block struct is already a pointer, so using pointers to it is redundant.	2024-05-30 13:07:18 +02:00
Aurélien Jacobs	ec6cfc1f21	stm32: ensure the core runs on HSI clock while setting up rcc	2024-05-27 17:31:29 +02:00
Dario Nieuwenhuis	6f44d7a9df	stm32: update metapac. Adds U5 LPDMA, fixes ADC_COMMONs.	2024-04-29 20:52:27 +02:00
Dario Nieuwenhuis	95234cddba	stm32: autogenerate mux config for all chips.	2024-03-01 23:54:37 +01:00
Dario Nieuwenhuis	c83ab20526	stm32: update metapac.	2024-02-26 03:02:58 +01:00
Eli Orona	2dfd66b7c4	🤦	2024-02-25 16:25:42 -08:00
Eli Orona	7dbae799dc	Rust FMT	2024-02-25 16:24:52 -08:00
Eli Orona	c23b59bdc8	Add pll1_p_mul_2 clock.	2024-02-25 16:12:32 -08:00
Eli Orona	e79d2dd756	Move to internal mod and re-export the enums	2024-02-24 12:54:58 -08:00
Eli Orona	2ee9b37373	Move to a single Mux Struct.	2024-02-20 17:54:35 -08:00
Eli Orona	e99ef49611	Move to auto-generated based system.	2024-02-16 19:57:00 -08:00
Eli Orona	c99c4a01a9	Update f013.rs	2024-02-16 16:47:38 -08:00
Eli Orona	7592e8be6e	Fix build	2024-02-16 16:45:58 -08:00
Eli Orona	77739faaeb	Rustfmt	2024-02-16 16:42:19 -08:00
Eli Orona	370db9fb06	Update f013.rs ... Add stm32f398	2024-02-16 16:39:23 -08:00
Eli Orona	d7623c7929	Remove extraneous , in cfg	2024-02-15 23:20:35 -08:00
Eli Orona	d28ba1d606	rustfmt	2024-02-15 23:16:17 -08:00
Eli Orona	56b345c722	Clean up register setting	2024-02-15 23:12:18 -08:00
Eli Orona	4408c169a5	Fix cfg lines	2024-02-15 22:55:11 -08:00
Eli Orona	029d6383b5	Rust fmt and fix build.	2024-02-15 20:02:25 -08:00
Eli Orona	169f1ce928	I believe that this enables the PLL clock input to different TIMs for the STM32F3xx Series of chips.	2024-02-15 19:50:42 -08:00
Dario Nieuwenhuis	1860e22693	stm32/rcc: unify f0, f1, f3.	2024-02-14 17:24:20 +01:00

Renamed from embassy-stm32/src/rcc/f3.rs (Browse further)