Commit graph

3667 commits

Author SHA1 Message Date
Dario Nieuwenhuis
ac74613b5a net: remove packet pool.
The pool was prone to deadlocks, especially due to having a single pool
for rx+tx. If the pool got full with rx'd packets it would deadlock because
processing a rx packet requires doing another allocation on the pool, for
the possibly tx'd response, before deallocating the rx'd packet.

This also allows Device impls to allocate the packet memory in a particular
RAM kind, if needed for example to do DMA.

The `Device` trait is now token-based, like smoltcp's. In the end, this
is better because it allows callers to manage memory however they want (including
with a pool if they want to).
2022-12-13 16:18:39 +01:00
bors[bot]
47747d3b73
Merge #1105
1105: embassy-rp: Add multicore support r=Dirbaio a=kalkyl

This PR adds multicore support + critical-section impl using hardware spinlocks.
Based on the rp2040-hal implementation.

Co-authored-by: kalkyl <henrik.alser@me.com>
Co-authored-by: Henrik Alsér <henrik.alser@me.com>
2022-12-13 14:55:34 +00:00
kalkyl
c4d8f3579e Update usage in docs 2022-12-13 14:15:04 +01:00
kalkyl
731eb3c6e3 fmt 2022-12-13 13:55:23 +01:00
Henrik Alsér
3d68c0400b
Merge branch 'master' into multicore 2022-12-13 13:51:48 +01:00
kalkyl
13d9d8fde1 Refactor after review 2022-12-13 13:49:51 +01:00
bors[bot]
36639e5262
Merge #1043 #1103
1043: Rpi Pico PIO driver r=Dirbaio a=fluffware

This is a driver for the two PIOs in the Pico. I've tried using the type system to get as much compile time checks as possible. There is asynchronous support for FIFOs an Irqs. No DMA support yet. There's an example that shows how to use the driver asynchronously.

1103: embassy-stm32: add rs485 driver enable to uart r=Dirbaio a=FrozenDroid



Co-authored-by: Simon Berg <ksb@fluffware.se>
Co-authored-by: Vincent Stakenburg <v.stakenburg@sinewave.nl>
2022-12-13 11:47:27 +00:00
Dario Nieuwenhuis
4fbd03a908
Merge pull request #1111 from overheat/embassy_net_readme
fix net README.md
2022-12-13 12:27:10 +01:00
kalkyl
aea28c8aa0 Add usage in to docs 2022-12-13 09:45:11 +01:00
Aaron Tsui
95fdc7c552 fix net README.md 2022-12-13 14:06:37 +08:00
kalkyl
eb1d2e1295 Pause CORE1 execution during flash operations 2022-12-13 04:02:28 +01:00
kalkyl
96d6c7243b Cleanup 2022-12-10 13:43:29 +01:00
kalkyl
d8821cfd41 Feature gate critical-section-impl 2022-12-10 12:57:45 +01:00
kalkyl
cc0248d83a Select critical-section in tests 2022-12-10 12:42:08 +01:00
kalkyl
34eaade14f fmt 2022-12-10 08:33:09 +01:00
kalkyl
1ee58492fb embassy-rp: Add multicore support 2022-12-10 08:26:35 +01:00
Dario Nieuwenhuis
5d4f09156a nrf: add manually_create_executor example. 2022-12-09 23:33:53 +01:00
Simon Berg
488e322478 Clear unused pulls in set_pull. 2022-12-09 20:30:17 +01:00
Simon Berg
cd59046e6c Added RelocateProgram class for adjusting PIO-programs for different origins. 2022-12-09 20:18:41 +01:00
Simon Berg
35db6e639b PIO support for RPi Pico 2022-12-09 20:18:41 +01:00
bors[bot]
e94ca0efd6
Merge #1051
1051: Adapted nvmc so it can be used for all nrf targets r=diondokter a=diondokter

Title says it all pretty much.
It's a bit annoying with the configs though.

I've made this a draft because I haven't really tested this yet.

Co-authored-by: Dion Dokter <dion@tweedegolf.com>
Co-authored-by: Dion Dokter <diondokter@gmail.com>
2022-12-09 16:45:55 +00:00
Vincent Stakenburg
236d104844 embassy-stm32: add rs485 driver enable to uart 2022-12-09 14:26:09 +01:00
Dion Dokter
f22297e3d6 Merge branch 'master' into nrf91/53-nvmc 2022-12-09 11:04:55 +01:00
Dion Dokter
1d2f97b4e2 Fixed erase bug 2022-12-09 11:02:16 +01:00
bors[bot]
58ab829049
Merge #1049
1049: embassy-nrf: Add I2S module r=lulf a=chris-zen

This PR adds I2S support for the nrf52 series (`nrf52832`, `nrf52833`, `nrf52840`).

We could only test it in a `nrf52840` in master mode for an output stream (see `i2s_waveform` example), using a clone of the [Adafruit I2S Stereo Decoder - UDA1334A](https://learn.adafruit.com/adafruit-i2s-stereo-decoder-uda1334a/overview).

We were wondering if this could be a welcome addition to embassy, as we are working on this very informally and don't have much free time for it.

<img src="https://user-images.githubusercontent.com/932644/202316127-a8cf90ef-1e1a-4e1d-b796-961b8ad6cef5.png" width="600">

https://user-images.githubusercontent.com/932644/202316609-e53cd912-e463-4e01-839e-0bbdf37020da.mp4


Co-authored-by: `@brainstorm` <brainstorm@nopcode.org>

Co-authored-by: Christian Perez Llamas <932644+chris-zen@users.noreply.github.com>
Co-authored-by: Roman Valls Guimera <brainstorm@users.noreply.github.com>
2022-12-09 07:49:40 +00:00
Christian Perez Llamas
5fdd521a76 Move the responsibility to manage buffers to the I2S stream 2022-12-08 20:22:50 +01:00
bors[bot]
1b8c0733e6
Merge #1098
1098: Reset sdmmc clock on card init r=Dirbaio a=chemicstry

Set clock back to 400kHz in `init_card()`, which allows card reinitialization if it was removed

Co-authored-by: chemicstry <chemicstry@gmail.com>
2022-12-07 15:34:49 +00:00
bors[bot]
94010d3362
Merge #1100
1100: net: remove unsafe, update smoltcp. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-12-06 23:29:15 +00:00
Dario Nieuwenhuis
f7fe0c1441 net: update smoltcp 2022-12-07 00:28:38 +01:00
chemicstry
7bda01ec24 Fix comment 2022-12-06 23:31:58 +02:00
bors[bot]
40f0272dd0
Merge #1099
1099: rp: implement input for OutputOpenDrain r=Dirbaio a=Dirbaio

Needed for onewire and similar protocols.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-12-06 20:12:29 +00:00
Dario Nieuwenhuis
54c153673d rp: add OutputOpenDrain input test. 2022-12-06 21:09:27 +01:00
Dario Nieuwenhuis
7cbc3aefe6 rp: implement input for OutputOpenDrain 2022-12-06 19:54:39 +01:00
chemicstry
ef2b83cc03 Reset sdmmc clock on card init 2022-12-06 16:36:07 +02:00
bors[bot]
5e94b8060b
Merge #1089
1089: feat: embassy-boot for rp2040 r=Dirbaio a=lulf

Add embassy-boot support for RP2040, with examples for the Raspberry Pi Pico.

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-12-04 19:58:57 +00:00
miathedev
a2712caab1 Add random example 2022-12-04 09:38:57 +01:00
Dario Nieuwenhuis
02abe00439 net: don't use UnsafeCell.
The "must not be called reentrantly" invariant is too "global" to
maintain comfortably, and the cost of the RefCell is negligible,
so this was a case of premature optimization.
2022-12-03 00:56:16 +01:00
Ulf Lilleengen
bb89a2341c
feat: embassy-boot for rp2040
Add embassy-boot support for RP2040, with examples for the Raspberry Pi
Pico.

Co-authored-by: Mathias Koch <mk@blackbird.online>
2022-12-02 11:28:33 +01:00
bors[bot]
f109e73c6d
Merge #1074
1074: Added blinky example for stm32f0 r=lulf a=imrank03

Hi, I have added **blinky** example for `stm32f0` and tested with Nucleo board `STM32F091RC`.

- Can I add more example for stm32f0?

Co-authored-by: @imrank03 <immu0396@gmail.com>
2022-12-02 08:10:12 +00:00
bors[bot]
9f854110f2
Merge #1082 #1083
1082: stm32: Add basic support for DMA priority settings r=lulf a=matoushybl

This adds very basic support for specifying priority for DMA interrupts. Unfortunately, the patch now doesn't allow for specifying different priorities for DMA1/DMA2, or BDMA1/BDMA2, which I didn't know how to support.

1083: stm32: Fix H7 unaligned erase r=lulf a=matoushybl

This PR simplifies erasing sectors on the H7, which was buggy.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-12-01 13:49:59 +00:00
bors[bot]
d8ea297d6a
Merge #1088
1088: stm32: Enable fifo for buffered uart r=lulf a=matoushybl

This PR enables fifo for buffered uart where it is available. This should hopfully get rid of some overrun errors. I tried it in my application where it worked, but more intensive testing is probably required.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-12-01 13:34:52 +00:00
Matous Hybl
e1d7d8d841 stm32: Enable fifo for buffered uart 2022-11-30 22:17:51 +01:00
bors[bot]
eb010fbe33
Merge #1086
1086: rp: Add an RngCore impl based on ROSC.RANDOMBIT r=Dirbaio a=yodaldevoid

This has the potential to not be random, but it should not be an issue if default clock settings are used.

Co-authored-by: Gabriel Smith <ga29smith@gmail.com>
2022-11-30 19:10:44 +00:00
Gabriel Smith
71df28e269 rp: Add an RngCore impl based on ROSC.RANDOMBIT
This has the potential to not be random, but it should not be an issue
if default clock settings are used.
2022-11-30 14:06:05 -05:00
bors[bot]
645fb66a51
Merge #1087
1087: embassy-stm32: Allow SPI with DMA to implement blocking embbeded-hal traits r=Dirbaio a=guillaume-michel

Before this PR, on STM32, SPI with DMA do not implement embedded-hal blocking traits even if it is allowed by the hardware.

This PR fixes this issue.

I could not do the same thing for `embassy_embedded_hal::shared_bus::asynch::SpiDevice` because  I could not figure out how to deal with "non-blocking" mutex in a non async fn. Maybe someone has the answer...

Hope it is still useful as is.

Co-authored-by: Guillaume MICHEL <guillaume@squaremind.io>
2022-11-30 13:45:26 +00:00
Guillaume MICHEL
e0ea5dfdb2 embassy-stm32: Allow SPI with DMA to implement blocking embbeded-hal traits 2022-11-30 09:26:16 +01:00
bors[bot]
8436c6180f
Merge #1085
1085: Bump defmt-rtt to 0.4 r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-11-29 20:19:25 +00:00
Dario Nieuwenhuis
1dcb0ea1f5 Bump defmt-rtt to 0.4 2022-11-29 21:15:24 +01:00
bors[bot]
902586a019
Merge #1084
1084: Bump embedded-nal-async to 0.3.0 r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-11-29 11:07:07 +00:00
Dario Nieuwenhuis
3135ad016d Bump embedded-nal-async to 0.3.0 2022-11-29 12:05:46 +01:00