Commit graph

1381 commits

Author SHA1 Message Date
Bob McWhirter
cf5b7dc943 Because IntelliJ makes life hard. 2021-06-30 10:03:18 -04:00
Bob McWhirter
6a0b0f3162 Enable RCC within the USART itself. 2021-06-30 09:57:27 -04:00
Bob McWhirter
e1736114d4 Remove paste. 2021-06-30 09:44:28 -04:00
Liam Murphy
99339e940e fix: check if new_ptr == end, not the old pointer 2021-06-30 16:04:34 +10:00
Liam Murphy
53b95588df Use atomics to share state instead of a RefCell 2021-06-30 15:55:52 +10:00
Liam Murphy
a64dec517c Update RNG example 2021-06-30 12:55:30 +10:00
Liam Murphy
89fdad3a6b Don't wake the future for every byte in fill_bytes 2021-06-30 12:34:57 +10:00
Liam Murphy
ae0219de6f Move initialisation inside of future 2021-06-30 09:45:49 +10:00
Bob McWhirter
d5fb558005 Fix non-DMA USART example. 2021-06-29 13:08:18 -04:00
Bob McWhirter
07a6686879 Protect DMA-related things with cfg. 2021-06-29 13:00:52 -04:00
Bob McWhirter
2a25de3d3e Make the metapac gen enr/rst missing regs non-fatal to the build.
Should be solved in a separate effort.
2021-06-29 12:55:15 -04:00
Bob McWhirter
6b78d56ceb Formatting. 2021-06-29 12:48:58 -04:00
Bob McWhirter
24f18819c8 Adjust example for RCC and DMA. 2021-06-29 11:01:57 -04:00
Bob McWhirter
c53ab325c1 Wire up DMA with USART v1. 2021-06-29 11:01:57 -04:00
Bob McWhirter
b88fc2847a Checkpoint with lifetime issues. 2021-06-29 11:01:57 -04:00
Bob McWhirter
1732551db4 Generate dma-related macro tables. 2021-06-29 11:01:45 -04:00
Liam Murphy
8a4ab29819 Add an nRF RNG driver
Resolves #187

Like the stm32 driver, this has both a non-blocking and blocking API, and implements `rand_core::RngCore` for the blocking API.
2021-06-29 17:26:16 +10:00
Dario Nieuwenhuis
d49adc98be
Merge pull request #260 from Liamolucko/nrf-timer
Add an nRF Timer driver
2021-06-29 07:37:06 +02:00
Liam Murphy
c0ef40d6e9 Correctly unset bits 2021-06-29 15:12:42 +10:00
Liam Murphy
e6d0dba5ca Write bits directly to intenset/clr + shorts 2021-06-29 14:37:37 +10:00
Liam Murphy
87ca902e44 Handle differences between PACs 2021-06-29 13:04:05 +10:00
Liam Murphy
0c0597f775 Don't include extended timer support on chips without it 2021-06-29 12:07:10 +10:00
Liam Murphy
94e13ef053 Fix Cc::event_compare 2021-06-29 11:39:50 +10:00
Liam Murphy
e5a5031f20 Get rid of the TODO about variant names, stop the timer before setting BITMODE and set a default frequency. 2021-06-29 11:29:32 +10:00
Liam Murphy
e7addf094b Fix Cc::wait never resolving and refactor some APIs
I think the interrupt was getting immediately re-triggered as soon as the handler exited, so I disabled the interrupt in the handler.
2021-06-29 10:33:41 +10:00
Dario Nieuwenhuis
f501907f9e
Merge pull request #259 from thalesfragoso/block-timer
Add BlockingTimer and features to choose tick rate
2021-06-28 23:58:51 +02:00
Thales Fragoso
51583afc1e Add docs for BlockingTimer and rename tick features 2021-06-28 18:52:27 -03:00
Thales Fragoso
54197d1663 Add BlockingTimer and features to choose tick rate 2021-06-28 18:01:40 -03:00
Dario Nieuwenhuis
cdb0c72849
Merge pull request #255 from thalesfragoso/od-pin
stm32: Allow for open drain configuration for output pin
2021-06-27 19:29:18 +02:00
Thales Fragoso
c5022b1196 stm32: Make sure Output gpio driver is pushpull 2021-06-27 13:25:35 -03:00
Liam Murphy
02781ed744 Add an nRF Timer driver
Resolves #189
2021-06-26 17:58:36 +10:00
Thales Fragoso
0eaadfc125 stm32: Update gpio examples 2021-06-25 18:16:43 -03:00
Thales Fragoso
a3f0aa02a4 Separate OpenDrain pin to a new type 2021-06-25 17:22:51 -03:00
Dario Nieuwenhuis
e6d6e82e54
Merge pull request #257 from embassy-rs/rp-clocks
rp: fixes and add SPi
2021-06-25 06:43:22 +02:00
Dario Nieuwenhuis
88bc2972f6 rp/spi: add write-only spi driver 2021-06-25 06:24:14 +02:00
Dario Nieuwenhuis
9cf1d5b29c rp/clocks: fix wrong PLL setup 2021-06-25 06:24:14 +02:00
Dario Nieuwenhuis
c7c897bb72 rp/gpio: add infallible inherent methods 2021-06-25 06:24:14 +02:00
Dario Nieuwenhuis
a35c8561c7
Merge pull request #256 from embassy-rs/rp-clocks
rp: clock setup
2021-06-25 03:51:39 +02:00
Dario Nieuwenhuis
5a6384d199 rp: clock setup 2021-06-25 03:38:21 +02:00
Thales Fragoso
efb3b3a0a8 stm32: Allow for open drain configuration for output pin 2021-06-24 20:42:43 -03:00
Thales
e1880a19df
Merge pull request #254 from thalesfragoso/f0-rcc
F0 rcc
2021-06-24 20:39:51 -03:00
Thales Fragoso
013792b944 Separate exti into v1 and v2 2021-06-24 20:28:06 -03:00
Thales Fragoso
1c33a3b94c #[cfg] exti 2021-06-24 19:41:04 -03:00
Thales Fragoso
210104e6dc Remove unused gpio_af from codegen 2021-06-24 19:23:51 -03:00
Thales Fragoso
409884be2a Add F0 RCC 2021-06-24 19:21:56 -03:00
Thales Fragoso
797534d1a6 Update features to include F0 2021-06-22 14:41:42 -03:00
Dario Nieuwenhuis
9e5406f761
Merge pull request #252 from thalesfragoso/net-resources
net: Make the user pass in the StackResources in init
2021-06-21 01:49:32 +02:00
Dario Nieuwenhuis
5a4e3ceb88 Update stm32-data (adds DBGMCU to all chips) 2021-06-21 01:38:59 +02:00
Thales Fragoso
aca0fb1065 net: Make the user pass in the StackResources in init
By having the user pass in the resources, we can make them generic, this way
the user can choose the size of the individual resources
2021-06-20 17:15:18 -03:00
Dario Nieuwenhuis
06d69a8028
Merge pull request #251 from embassy-rs/net-fix
net/tcp: Fix panic when consuming 0 bytes at EOF
2021-06-18 02:06:41 +02:00