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378 commits

Author SHA1 Message Date
Dario Nieuwenhuis
9352621058
Merge pull request from barnabywalters/g4rcc 
[embassy-stm32]: stm32g4 RCC refactor
 2024-02-16 23:38:49 +00:00
Barnaby Walters
6d7458dac7 Refinements 
* Implemented boost mode dance (RM0440 p234-245, 6.5.1)
* Enabled boost mode in usb_serial example, tested on hardware
* Removed hard requirement of a valid 48MHz source (HSI48 is checked if
  requested, PLL passed through as-is and assumed to be valid)
* Used calc_pclk to calculate APB frequencies
* Refactored 48MHz configuration code to remove unnecessary let and block
* Renamed ahb_freq to hclk for clarity and consistency
 2024-02-17 00:30:16 +01:00
Barnaby Walters
a24087c36c Configured SYSCLK after boost mode, added comments 2024-02-16 21:52:58 +01:00
Barnaby Walters
e465dacf73 Added documentation, fixed and refined boost and flash read latency config 2024-02-16 21:34:12 +01:00
Barnaby Walters
25a95503f6 Configured HSI48 if enabled, assert is enabled if chosen as clk48 source 2024-02-16 20:41:04 +01:00
Barnaby Walters
ae74833999 Removed redundant HSI48 configuration 2024-02-16 20:32:35 +01:00
Barnaby Walters
32e4c93954 Removed dangling doc comments 2024-02-16 19:58:19 +01:00
Dario Nieuwenhuis
ae02467434 stm32: update metapac. 2024-02-16 02:07:21 +01:00
Barnaby Walters
396041ad1a Commented out currently unused constants 2024-02-16 00:04:35 +01:00
Barnaby Walters
5b7eff6541 [embassy-stm32]: started stm32g4 RCC refactor 
* Copied API from f.rs where applicable
* HSE and HSI independantly configurable
* Boost mode set by user rather
* Added HSE, pll1_q and pll1_p frequencies to set_clocks call
* Stubbed max module based on f.rs, needs cleanup
 2024-02-15 23:56:26 +01:00
Dario Nieuwenhuis
1860e22693 stm32/rcc: unify f0, f1, f3. 2024-02-14 17:24:20 +01:00
Dario Nieuwenhuis
ccd2c574c3 stm32/rcc: port F0 to new API. 2024-02-13 01:21:51 +01:00
Dario Nieuwenhuis
b7c147445a stm32/rcc: port F1 to new API. 2024-02-13 01:21:51 +01:00
Dario Nieuwenhuis
739c69bd63 stm32/rcc: some f3 fixes. 2024-02-13 01:15:54 +01:00
Dario Nieuwenhuis
937a9e7955 stm32/rcc: use h7 sdlevel enum from pac. 2024-02-12 20:58:04 +01:00
Dario Nieuwenhuis
0dc5e6d3e4 stm32/rcc: port F3 RCC to new API 
See
2024-02-12 02:19:31 +01:00
Dario Nieuwenhuis
832776d2c7 stm32: update metapac. 2024-02-10 02:50:35 +01:00
Badr Bouslikhin
e72cc9fb24
fix(stm32/h7): use correct unit in vco clock check 2024-02-06 11:33:39 +01:00
Dario Nieuwenhuis
6c72638ed0 stm32/rcc: fix more build failures. 2024-02-04 22:47:29 +01:00
Dario Nieuwenhuis
e3fe08428f stm32/rcc: fix build for some f0 and l4 chips. 
Fixes
2024-02-04 22:07:17 +01:00
Dario Nieuwenhuis
9866847375 stm32: autogenerate clocks struct, enable mux for all chips. 2024-02-02 23:24:34 +01:00
Romain Goyet
92690d8590 Migrate STM32WBA to RCCv3 2024-02-02 14:12:26 -05:00
Romain Goyet
aa767272a8 STM32WBA's high speed external clock has to run at 32 MHz 2024-02-01 13:42:48 -05:00
Corey Schuhen
1de78d0490 Initial FDCAN driver implementation. 
Original author:
    Torin Cooper-Bennun <tcbennun@maxiluxsystems.com>

Cleanup and documentaion by:
    Tomasz bla Fortuna <bla@reactor.local>
    Corey Schuhen <cschuhen@gmail.com>

Use new PAC method now that the names are common.

Use broken out definitions that can be shared with bxcan

Populate Rx struct with an embassy timestamp.

Remove use of RefCell.

As per review comment. - THis will probably get squashed down.

Fix
 2024-01-31 05:40:05 +10:00
Tomasz bla Fortuna
03ba45065e Add FDCAN clock registers to G4 RCC. 
Author: Adam Morgan <adam@luci.com>

Break definitions out of bxcan that can be used innm fdcan.

Typo
 2024-01-31 05:40:05 +10:00
Derek Hageman
801a36c7b4 stm32: Add G0 USB RCC 
Add configuration for STM32G0 USB clock.
 2024-01-05 07:56:22 -07:00
Tyler Gilbert
7944e854dd Fix formatting of comments 2024-01-03 11:07:57 -06:00
Tyler
727906fa04
Update u5.rs 
Update comments on p and q divider values to correctly describe what the clock outputs are used for.
 2024-01-03 11:04:48 -06:00
Tyler Gilbert
31bf127807 Update STM32 RCC U5 to support P and Q dividers 2024-01-03 10:46:45 -06:00
Adin Ackerman
d372cba266 additional chip variants required more clocks 2024-01-02 16:25:51 -08:00
Adin Ackerman
34713b4910 fix g0 being left out of some clock controls 2024-01-02 16:03:23 -08:00
Dario Nieuwenhuis
124478c5e9 stm32: more docs. 2023-12-18 19:11:23 +01:00
Oliver Rockstedt
560e728132 STM32H7: adjust flash latency and programming delay for series in RM0468 2023-12-15 14:14:30 +01:00
Oliver Rockstedt
c17fee27bb STM32H7: limit max frequency to 520MHz until cpu frequency boost option is implemented 2023-12-15 13:53:06 +01:00
Oliver Rockstedt
a8d0da91dc STM32H7: adjust frequency limits for series in RM0468 2023-12-15 12:22:17 +01:00
Oliver Rockstedt
e5e85ba02b STM32H7: Allow PLL1 DIVP of 1 for certain series 2023-12-15 11:42:58 +01:00
Dario Nieuwenhuis
4051aead0f stm32: update stm32-metapac. Fixes USB on STM32WB. 2023-12-08 23:45:12 +01:00
Dario Nieuwenhuis
a9ec623622
Merge pull request from CaptainMaso/adc_f3_v1_1 
stm32: add ADC f3_v1_1
 2023-12-08 19:30:50 +00:00
Dario Nieuwenhuis
c27459c052 Update stm32-metapac. 2023-12-08 20:07:59 +01:00
Carlos Barrales Ruiz
09592ffa6a stm32/rcc: Add support for HSE Oscillator in stm32g0 2023-12-04 13:28:00 +01:00
Badr Bouslikhin
ea43d74780
stm32/rcc: add missing h7 power config 2023-12-02 14:55:00 +01:00
Badr Bouslikhin
22c39fd697
stm32/rcc: refactor h7 rm0455,rm0468 and rm0468 power management 2023-12-02 14:47:36 +01:00
Badr Bouslikhin
87c0f1525d
stm32/rcc: enable power supply configurability for rm0455 and rm0468 2023-12-02 14:45:36 +01:00
Badr Bouslikhin
c97f65ac60
stm32/rcc: make h7 rm0399 power supply configurable 2023-12-01 15:05:31 +01:00
Adam Greig
2218d30c80 STM32: Remove vestigal build.rs cfgs, add new flashsize_X and package_X cfgs, use in F3 RCC 2023-11-25 00:29:45 +01:00
RobertTDowling
7f258cd3c4 PR feedback 2023-11-19 15:56:34 -08:00
RobertTDowling
4947b13615 stm32h7 ADC: Fix stalled clock in default h7 config 2023-11-15 17:11:16 -08:00
Dario Nieuwenhuis
ace5221080 stm32/rcc: unify f2 into f4/f7. 2023-11-13 01:59:33 +01:00
Dario Nieuwenhuis
2376b3bdfa stm32/rcc: fix pll enum naming on f4, f7. 2023-11-13 01:56:50 +01:00
Dario Nieuwenhuis
066dc297ed stm32/rcc: unify l0l1 and l4l5. 2023-11-13 01:05:07 +01:00