eZio Pan
d9e59e8e42
low power for h5
2024-04-28 00:33:02 +08:00
Dominic
71179fa818
Check for CPU_FREQ_BOOST
2024-03-09 11:55:09 +01:00
Dominic
fadffc5061
Fix incorrect D1CPRE max for STM32H7 RM0468
2024-03-09 11:55:09 +01:00
Dario Nieuwenhuis
95234cddba
stm32: autogenerate mux config for all chips.
2024-03-01 23:54:37 +01:00
Maia
b7e0964a07
added FDCANSEL logic for H7
2024-02-27 11:07:05 -08:00
Dario Nieuwenhuis
c83ab20526
stm32: update metapac.
2024-02-26 03:02:58 +01:00
Dario Nieuwenhuis
937a9e7955
stm32/rcc: use h7 sdlevel enum from pac.
2024-02-12 20:58:04 +01:00
Dario Nieuwenhuis
832776d2c7
stm32: update metapac.
2024-02-10 02:50:35 +01:00
Badr Bouslikhin
e72cc9fb24
fix(stm32/h7): use correct unit in vco clock check
2024-02-06 11:33:39 +01:00
Dario Nieuwenhuis
9866847375
stm32: autogenerate clocks struct, enable mux for all chips.
2024-02-02 23:24:34 +01:00
Corey Schuhen
1de78d0490
Initial FDCAN driver implementation.
...
Original author:
Torin Cooper-Bennun <tcbennun@maxiluxsystems.com>
Cleanup and documentaion by:
Tomasz bla Fortuna <bla@reactor.local>
Corey Schuhen <cschuhen@gmail.com>
Use new PAC method now that the names are common.
Use broken out definitions that can be shared with bxcan
Populate Rx struct with an embassy timestamp.
Remove use of RefCell.
As per review comment. - THis will probably get squashed down.
Fix
2024-01-31 05:40:05 +10:00
Tomasz bla Fortuna
03ba45065e
Add FDCAN clock registers to G4 RCC.
...
Author: Adam Morgan <adam@luci.com>
Break definitions out of bxcan that can be used innm fdcan.
Typo
2024-01-31 05:40:05 +10:00
Oliver Rockstedt
560e728132
STM32H7: adjust flash latency and programming delay for series in RM0468
2023-12-15 14:14:30 +01:00
Oliver Rockstedt
c17fee27bb
STM32H7: limit max frequency to 520MHz until cpu frequency boost option is implemented
2023-12-15 13:53:06 +01:00
Oliver Rockstedt
a8d0da91dc
STM32H7: adjust frequency limits for series in RM0468
2023-12-15 12:22:17 +01:00
Oliver Rockstedt
e5e85ba02b
STM32H7: Allow PLL1 DIVP of 1 for certain series
2023-12-15 11:42:58 +01:00
Badr Bouslikhin
ea43d74780
stm32/rcc: add missing h7 power config
2023-12-02 14:55:00 +01:00
Badr Bouslikhin
22c39fd697
stm32/rcc: refactor h7 rm0455,rm0468 and rm0468 power management
2023-12-02 14:47:36 +01:00
Badr Bouslikhin
87c0f1525d
stm32/rcc: enable power supply configurability for rm0455 and rm0468
2023-12-02 14:45:36 +01:00
Badr Bouslikhin
c97f65ac60
stm32/rcc: make h7 rm0399 power supply configurable
2023-12-01 15:05:31 +01:00
RobertTDowling
7f258cd3c4
PR feedback
2023-11-19 15:56:34 -08:00
RobertTDowling
4947b13615
stm32h7 ADC: Fix stalled clock in default h7 config
2023-11-15 17:11:16 -08:00
Dario Nieuwenhuis
0272deb158
stm32/rcc: add shared code for hsi48 with crs support.
2023-11-05 23:52:54 +01:00
Dario Nieuwenhuis
a39ae12edc
stm32/rcc: misc cleanups.
2023-10-23 17:36:21 +02:00
Dario Nieuwenhuis
3d03c18d4f
stm32/tests: add stm32h753zi, stm32h7a3zi.
2023-10-21 04:46:45 +02:00
Dario Nieuwenhuis
7ce3b19389
stm32/rcc: remove unused enum.
2023-10-18 04:32:18 +02:00
xoviat
b24520579a
rcc: ahb/apb -> hclk/pclk
2023-10-15 19:51:35 -05:00
xoviat
4a156df7a1
stm32: expand rcc mux to g4 and h7
2023-10-14 23:33:57 -05:00
Dario Nieuwenhuis
3bfbf2697f
stm32/rcc: remove unused lse/lsi fields in h7
2023-10-15 01:48:27 +02:00
xoviat
824556c9c8
rcc: remove mux_prefix from clocks
2023-10-14 12:51:45 -05:00
xoviat
3264941c1b
rcc mux: update metapac
2023-10-13 23:06:32 -05:00
xoviat
57ccc1051a
stm32: add initial rcc mux for h5
2023-10-11 20:59:47 -05:00
Dario Nieuwenhuis
b91d1eaca0
stm32/rcc: add LSE/LSI to all chips, add RTC to more chips.
2023-10-11 04:12:38 +02:00
Dario Nieuwenhuis
0cfa8d1bb5
stm32/rcc: use more PLL etc enums from PAC.
2023-10-11 00:12:33 +02:00
Dario Nieuwenhuis
6186fe0807
stm32/rcc: use PLL enums from PAC.
2023-10-09 02:48:22 +02:00
Matt Ickstadt
f01609036f
h7: implement RTC and LSE clock configuration
2023-10-06 13:28:30 -05:00
Dario Nieuwenhuis
e03239e88d
stm32: centralize enabling pwr, syscfg, flash.
2023-09-25 01:07:55 +02:00
Dario Nieuwenhuis
83b4c01273
stm32/rcc: unify h5 and h7.
2023-09-21 23:47:56 +02:00
