NaxdyOrg/embassy
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1208 commits

Author SHA1 Message Date
JuliDi
56dd22f0ac
feature-gate set_channel_mode, undo dma.rs changes 2023-06-27 21:23:47 +02:00
JuliDi
afec1b439b
feature-gate dma write, make trigger not return a result 2023-06-27 18:17:51 +02:00
JuliDi
e7bc84dda8
fix issues when DAC2 present, add additional options to DMA (NOT YET WORKING with STM32H7A3ZI) 2023-06-26 09:42:25 +02:00
JuliDi
8cafaa1f3c
add docs, cleanup 2023-06-25 11:54:25 +02:00
JuliDi
df944edeef
fix minor issues with splitting channels etc 2023-06-25 10:53:35 +02:00
JuliDi
388d3e273d
first attempt at fixing the 2nd channel problem 2023-06-24 13:10:59 +02:00
JuliDi
915f79c974
allow independent use of ch1 and ch2 on dac 2023-06-23 12:14:40 +02:00
JuliDi
ea04a0277b
change dma complete transfer IR default to true 2023-06-23 12:14:26 +02:00
JuliDi
78736328a0
update docs and update to new dma interface 2023-06-22 10:44:08 +02:00
JuliDi
8d0095c618
add option to enable/disable complete transfer interrupt 2023-06-22 10:43:45 +02:00
JuliDi
fdb3c3d6ff
Merge remote-tracking branch 'upstream/main' 2023-06-21 11:52:53 +02:00
Dario Nieuwenhuis
2e625138ff
Merge pull request #1501 from xoviat/can 
async can
 2023-06-20 22:57:31 +00:00
xoviat
ca21027eea
Merge pull request #3 from schphil/can 
fix extended can id
 2023-06-20 17:45:28 -05:00
xoviat
0a551eb7c6 stm32/can: fix time 2023-06-20 17:39:00 -05:00
xoviat
0998221478 stm32/can: update interrupts 2023-06-19 16:05:59 -05:00
Dario Nieuwenhuis
428a4ba3f9 stm32/gpdma: clear all interrupts after reset. 
Reset doesn't clear them, this causes subsequent transfers to instantly
complete because the TC flag was set from before.
 2023-06-19 23:03:31 +02:00
xoviat
aaad906815 Merge branch 'main' of https://github.com/embassy-rs/embassy into can 2023-06-19 15:52:33 -05:00
JuliDi
56ab6d9f14
remove write_X variants 2023-06-19 13:54:22 +02:00
JuliDi
88052480b1
fix typo, minor cleanup 2023-06-19 13:50:17 +02:00
JuliDi
218b102b28
remove Alignment and make Value and Value array look the same 2023-06-19 13:46:17 +02:00
JuliDi
fe7b72948a
add ValueArray type and respective write functions 2023-06-19 13:42:25 +02:00
Dario Nieuwenhuis
3c70f799a2
Merge pull request #1572 from whitequark/bdma-blocking_wait-stop 
BDMA: request stop after busy loop in blocking_wait()
 2023-06-19 09:55:07 +00:00
JuliDi
e0747e937f
remove unsafe for circular dma reg access 2023-06-19 11:15:09 +02:00
JuliDi
320e2cf35b
Merge branch 'main' of github.com:embassy-rs/embassy 2023-06-19 11:14:48 +02:00
Catherine
bbc81146ec BDMA: request stop after busy loop in blocking_wait(). 
Otherwise the channel cannot be used again, since CR.EN remains set
and the DMA channel registers are read-only while it is set.
 2023-06-19 09:06:41 +00:00
Dario Nieuwenhuis
558918651e stm32: update stm32-metapac. 2023-06-19 03:22:12 +02:00
JuliDi
f8ee33abb9
add half transfer interrupt and circular dma 2023-06-18 18:51:36 +02:00
Dario Nieuwenhuis
adaed307b4
Merge pull request #1561 from petegibson/stm32-buffereduart-int-flags-fix 
Ensure idle & ove flags are cleared in BufferedUart ISR on STM32
 2023-06-18 10:40:22 +00:00
Peter Gibson
b4f96e192c Don't read data register to clear flags on usart v3 ^& v4 2023-06-18 08:45:58 +10:00
xoviat
ae83e6f536
Merge pull request #1566 from xoviat/tl-mbox-2 
tl-mbox: switch to new ipcc mechanism
 2023-06-17 20:48:37 +00:00
xoviat
6b5d55eb29 stm32/wpan: convert to new ipcc 2023-06-17 12:00:33 -05:00
xoviat
4c9b7befaa stm32/ipcc: add clear debug 2023-06-17 10:50:06 -05:00
JuliDi
78a2ca8a0e
remove unnecessary use, disable DAC and DMA after transfer 2023-06-17 11:51:57 +02:00
JuliDi
f5d084552d
implement mwe of a DMA write() method for DAC 2023-06-17 11:48:21 +02:00
Dario Nieuwenhuis
ec36225f8a
Merge pull request #1560 from kevswims/feature/stm32g4-pll-enhancements 
Feature/stm32g4 pll enhancements - Add PLL support for the P and Q outputs for G4 series chips
 2023-06-16 16:06:50 +00:00
Philipp Scheff
f6c1108bdf fix extended can id 2023-06-16 14:56:28 +02:00
Peter Gibson
d236f3dbf9 actually fix formatting 2023-06-15 18:35:58 +10:00
Peter Gibson
d23717904b fix formatting 2023-06-15 18:33:01 +10:00
Peter Gibson
837950cd74 ensure DR is read to clear idle/overflow interrupt when they occur independently of the rxne 2023-06-15 13:24:49 +10:00
Kevin Lannen
c94ba84892 stm32g4: PLL: Add support for configuring PLL_P and PLL_Q 2023-06-14 10:44:51 -06:00
goueslati
2d89cfb18f fix merge conflict 2023-06-12 14:27:53 +01:00
goueslati
ca8957da43 stm32/ipcc: move tl_mbox into embassy-stm32-wpan 2023-06-12 12:27:51 +01:00
Dario Nieuwenhuis
98c821ac39 Remove embassy-cortex-m crate, move stuff to embassy-hal-common. 2023-06-09 16:44:20 +02:00
Dario Nieuwenhuis
dc8e34420f Remove executor dep+reexports from HALs. 
Closes #1547
 2023-06-09 16:29:45 +02:00
Carl St-Laurent
8ddeaddc67
Rename to follow ref manual and CubeIDE 2023-06-08 20:46:48 -04:00
Carl St-Laurent
0915fb73b2
Merge branch 'master' into stm32g4-pll 2023-06-08 20:43:14 -04:00
Dario Nieuwenhuis
8c93805ab5 Add rt feature to HALs, cfg out interrupt handling when not set. 2023-06-08 18:57:03 +02:00
Dario Nieuwenhuis
5c2f02c735 Reexport NVIC_PRIO_BITS at HAL root. 
This allows using RTIC with `#[rtic::app(device = embassy_nrf, ...)]`
 2023-06-08 18:07:49 +02:00
Dario Nieuwenhuis
bce24e8005 asdg 2023-06-08 18:07:49 +02:00
Dario Nieuwenhuis
921780e6bf Make interrupt module more standard. 
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.

This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
  - It works with `cortex-m` functions for manipulating interrupts, for example.
  - It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
 2023-06-08 18:00:48 +02:00