Commit graph

3265 commits

Author SHA1 Message Date
Ulf Lilleengen
72c2e985bb Update embedded-hal versions and explicitly pin 2022-09-29 11:27:46 +02:00
Mathias
7152031229 Add flash ram helpers 2022-09-29 10:03:49 +02:00
Mathias
7ee7109508 Rebase on master 2022-09-29 10:00:13 +02:00
Mathias
f9c62d4f1d Add flowcontrol to UART 2022-09-29 09:12:17 +02:00
Mathias
dc90006982 Remove code duplication on nb_read 2022-09-29 07:58:11 +02:00
Chuck Davis
bb84d7a0ae
Merge branch 'embassy-rs:master' into master 2022-09-28 14:33:03 -05:00
ceekdee
526e90d3f3 Update some outstanding questions 2022-09-28 14:27:34 -05:00
bors[bot]
77ece3f903
Merge #983
983: Remove subghz static lifetime requirement r=lulf a=lulf



Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-09-28 09:33:50 +00:00
Ulf Lilleengen
d7f7614b22 Remove subghz static lifetime requirement 2022-09-28 11:32:11 +02:00
Mathias
823bd714fb Add E-H1 uart blocking & nb implementation 2022-09-28 05:19:43 +02:00
ceekdee
a89a0c2f12 Initial add for sx126x 2022-09-27 21:55:41 -05:00
bors[bot]
9bb43ffe9a
Merge #914
914: (embassy-rp): Add I2C master implementation r=Dirbaio a=MathiasKoch

This PR adds both blocking and DMA based async implementations of I2C master.

Both E-H 0.2 & E-H 1.0 abstractions are implemented as well.

### Questions & concerns:
- Do we need an I2C interrupt handler (for transfer done, abort & error handling?) (async only)
- Do we need to add some automatic attempt at unblocking an I2C bus in case of failures (see ref: 7ebfd553f3/src/i2c_dma.c (L116-L142))
- Should I add `vectored_{read, write}` implementations?

Co-authored-by: Mathias <mk@blackbird.online>
Co-authored-by: Mathias Koch <mk@blackbird.online>
2022-09-27 20:09:53 +00:00
Mathias
bf1da0497c Allow unused fields temporarily in i2c 2022-09-27 22:08:49 +02:00
Mathias
44c46e3c93 Move async i2c implementation to new PR, to merge working blocking implementation faster 2022-09-27 22:08:49 +02:00
Mathias Koch
b0d91e9f31 Apply suggestions from code review
Co-authored-by: Jacob Gonzalez <jacobgonzalez5252@gmail.com>
2022-09-27 22:08:49 +02:00
Mathias
53c34ccc39 Add async API for I2C 2022-09-27 22:08:49 +02:00
Mathias
be68d8ebb7 Add further i2c error types 2022-09-27 22:08:49 +02:00
Mathias
603513e76e Fix blocking I2C 2022-09-27 22:08:49 +02:00
Mathias
bcd3ab4ba1 Add blocking read & write for I2C 2022-09-27 22:08:49 +02:00
Mathias
820e6462b6 Add preliminary I2C implementation for RP2040 2022-09-27 22:08:49 +02:00
bors[bot]
5c882cf4fa
Merge #979
979: usb: make HALs depend only on embassy-usb-driver. r=Dirbaio a=Dirbaio

Follow up to #972 

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-09-27 11:17:14 +00:00
Dario Nieuwenhuis
17d8d11f73 usb: make HALs depend only on embassy-usb-driver. 2022-09-27 13:16:49 +02:00
bors[bot]
82d4360756
Merge #934
934: (embassy-rp): Add Buffered UART implementation r=MathiasKoch a=MathiasKoch

### Questions & concerns: 
- ~~Would it make sense to add `RxBufferedUart` and `TxBufferedUart`, for cases where you would want to only buffer one way?~~
- ~~Do I need to be monitoring more interrupt flags than `Receive` & `Receive timeout`?~~

This PR adds working `BufferedUart` implementation, along with `RxBufferedUart` and `TxBufferedUart`. The implementation leaves room for improvement with respect to performance, as it still does not utilize DMA nor the internal UART buffers.

Co-authored-by: Mathias <mk@blackbird.online>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-09-27 06:00:33 +00:00
Mathias
e129a97d48 Fix bufferedUart read and write tests 2022-09-27 07:45:10 +02:00
Mathias
93354b812c Extend buffered-uart test to transmit 32 bytes 2022-09-27 05:54:31 +02:00
Mathias
65907204d6 Rename from {Rx,Tx}BufferedUart to BufferedUart{Rx,Tx} to be compliant with stm32 and nrf implementations 2022-09-27 05:51:31 +02:00
Mathias
cd539ba3a0 Rebase 2022-09-27 05:51:14 +02:00
bors[bot]
86fd480672
Merge #973
973: Rework STM32 BufferedUart internals so we can split into Rx and Tx like embassy-nrf r=lulf a=guillaume-michel

Context:
On STM32, BufferedUart is not splittable into Rx and Tx part like the non buffered version. On embassy-nrf, a RefCell is used to make BufferedUarte splittable.

Description:
This PR add the possibility to split BufferedUart into Rx and Tx without adding breaking changes.

Hope somebody find it useful

Co-authored-by: Guillaume MICHEL <guillaume@squaremind.io>
2022-09-26 19:30:15 +00:00
bors[bot]
de0070948c
Merge #976
976: rp: enable time-driver in Cargo.toml instead of ci.sh r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-09-26 19:05:39 +00:00
bors[bot]
7bbb4c22a1
Merge #977
977: Use firmware writer in stm32{f7, h7} example app r=lulf a=lulf

The new FirmwareWriter is useful in particular for these architectures due to the large erase sector size.

Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
2022-09-26 18:47:05 +00:00
Ulf Lilleengen
5bf6564e95 Use firmware writer in stm32{f7, h7} example app
The new FirmwareWriter is useful in particular for these architectures
due to the large erase sector size.
2022-09-26 20:36:57 +02:00
Dario Nieuwenhuis
c863acd24f rp: set correct teleprobe target for rpi-pico tests. 2022-09-26 20:36:06 +02:00
Mathias
f76444bdc4 Add HIL test for bufferedUart 2022-09-26 20:34:55 +02:00
Mathias
b3dfd06dd6 Remove code-duplication in async bufferedUart implementations 2022-09-26 20:34:55 +02:00
Mathias
1db9e464ff Enable embedded-io on nightly 2022-09-26 20:34:55 +02:00
Mathias
d6af0f6286 Formatting 2022-09-26 20:34:55 +02:00
Mathias
f2239d34cc Add bufferedUart, including a split version for only Rx or Tx 2022-09-26 20:34:55 +02:00
Mathias
ee76831f93 Add BufferedUart implementation, and feature-guard time-driver initialization, to free up TIMER peripheral if not used with embassy executor 2022-09-26 20:34:55 +02:00
Dario Nieuwenhuis
75e93cc142 rp: enable time-driver in Cargo.toml instead of ci.sh 2022-09-26 20:33:20 +02:00
bors[bot]
049c31613b
Merge #975
975: rp: Disable intrinsics by default. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-09-26 17:57:48 +00:00
Dario Nieuwenhuis
1e95c4fcff rp: Disable intrinsics by default. 2022-09-26 19:53:22 +02:00
Guillaume MICHEL
daf2744716 Rework STM32 BufferedUart internals so we can split into Rx and Tx like embassy-nrf 2022-09-26 15:32:29 +02:00
bors[bot]
49070c75b6
Merge #972
972: Restructure USB crates r=Dirbaio a=Dirbaio

- Split driver from `embassy-usb` to a separate crate. This allows making breaking changes to `embassy-usb` without having to bump all the crates with driver impls, such as HALs.
- Merge classes into `embassy-usb`. Now that breaking changes to `embassy-usb` aren't that bad, having everything in a single crate is much easier.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-09-26 11:32:41 +00:00
Dario Nieuwenhuis
f27a47a37b usb: move classes into the embassy-usb crate. 2022-09-26 13:00:21 +02:00
Dario Nieuwenhuis
f4f5824972 usb: do not allow converting Directon to/from u8 2022-09-26 12:35:33 +02:00
Dario Nieuwenhuis
7f7c14b7bc usb: split driver trait to separate crate. 2022-09-26 12:29:27 +02:00
bors[bot]
dc376a2390
Merge #965
965: (embassy-rp): add RP2040 ROM functions and intrinsics aliases r=Dirbaio a=MathiasKoch

Add RP2040 ROM functions described in section **2.8.3.1. Bootrom Functions** of https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf

Make all ROM functions (normal and floating point) provide both a direct
call that does the operation and a module with a ptr() function to get
the function pointer.

Add a feature to enable automatic caching of the result of ROM table
function lookups.

Add a check for a V2 bootrom when using floating point functions that
require it.  Panic when it's not present.

Add a standardized macro for intrinsics export and connect the simple
ROM functions to intrinsics.

Direct copy from `rp-hal`! Full credit to those guys for all the heavy lifting.

Co-authored-by: Mathias <mk@blackbird.online>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-09-26 09:58:06 +00:00
Dario Nieuwenhuis
fa7781c48d Add credits to rp-hal 2022-09-26 11:57:26 +02:00
bors[bot]
a9efbf18c6
Merge #960
960: Add non blocking Bxcan constructor r=Dirbaio a=andyblarblar

This PR adds a non-blocking constructor to the Bxcan Can wrapper struct. This allows for the creation of the Can periferal without blocking for a sync with the Can bus.

Co-authored-by: Andrew Ealovega <Andrew@Ealovega.dev>
2022-09-26 09:39:55 +00:00
bors[bot]
3c06a18b94
Merge #971
971: (embassy-boot): add blocking API to FirmwareUpdater r=lulf a=MathiasKoch

Also add a split `prepare_update` + `write_firmware` API, to allow for an optimized update API at the exchange of added complexity. 
The old API is left in place to allow users to choose the complexity level that fits their needs. 

Co-authored-by: Mathias <mk@blackbird.online>
2022-09-26 08:53:25 +00:00