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2332 commits

Author SHA1 Message Date
Sebastian Goll
2e2986c67b It is not necessary to wait for SB and MSL sequentially 2024-03-27 00:32:06 +01:00
Sebastian Goll
c1175bf7d8 It is not necessary to wait for STOP to be fully generated 2024-03-27 00:32:06 +01:00
Sebastian Goll
accec7a840 Implement asynchronous transaction for I2C v1 2024-03-27 00:32:06 +01:00
Sebastian Goll
9c00a40e73 Extract frame options generation into iterator to reuse in async 2024-03-26 22:53:14 +01:00
Sebastian Goll
0885c102d3 Refactor async I2C transfers to use frame options 2024-03-26 22:53:14 +01:00
Sebastian Goll
746ded94b1 Fix minor typos 2024-03-26 22:53:14 +01:00
eZio Pan
cf11d28d62 stm32 H5: LSE low drive mode is not functional 2024-03-27 00:55:44 +08:00
Emilie Burgun
1acc34bfaa Remove the need for TxDma to be a DMA channel in the blocking UartTx impl 2024-03-26 17:45:38 +01:00
Emilie Burgun
402def86ee Remove ad-hoc fixes for setting the IOSV bit to true 2024-03-26 17:27:02 +01:00
Emilie Burgun
ca998c170f Missing half of the implementation detail comment 2024-03-26 16:33:41 +01:00
Emilie Burgun
64964bd614 Add a config option to make the VDDIO2 supply line valid 
On STM32L4[7-A]xx, STM32L5xxx and STM32U5xxx chips, the GPIOG[2..15] pins are only available
once the IOSV bit has been set in PWR->CR2 (U5 chips have the bit in a funkier register).

This is meant to allow the user to have control over this power supply, so the GPIOG pins
are initially insulated, until the user wishes to un-insulate them (or something like that?).
For most applications, though, the VDDIO2 is connected to the VDD line, and this behavior only
gets in the way and causes confusing issues.

This submission adds an option in `embassy_stm32::Config`, called `enable_independent_io_supply`,
which simply enables the IOSV bit. It is only available on chips for which I could find a mention
of IOSV (STM32L4 and STM32L5) or IO2SV (STM32U5).
 2024-03-26 16:22:05 +01:00
eZio Pan
6b2e15e318 stm32 CORDIC: exclude stm32u5a 2024-03-26 15:06:06 +08:00
eZio Pan
8fa1d06a6a stm32 CORDIC: use private_bounds for sealed traits. 2024-03-23 09:15:25 +08:00
eZio Pan
0abcccee96 stm32 CORDIC: re-design API 2024-03-23 09:15:25 +08:00
eZio Pan
fac4f9aa2f stm32 CORDIC: typo fix 2024-03-23 09:15:25 +08:00
eZio Pan
0d065ab2d6 stm32 CORDIC: add HIL test 2024-03-23 09:15:25 +08:00
eZio Pan
c42d9f9eaa stm32 CORDIC: bug fix 2024-03-23 09:15:25 +08:00
eZio Pan
641da3602e stm32 CORDIC: error handle 2024-03-23 09:15:25 +08:00
eZio Pan
10a9cce855 stm32 CORDIC: DMA for q1.31 and q1.15 2024-03-23 09:15:25 +08:00
eZio Pan
2fa04d93ed stm32 CORDIC: DMA for q1.31 2024-03-23 09:15:25 +08:00
eZio Pan
c9f759bb21 stm32 CORDIC: ZeroOverhead for q1.31 and q1.15 2024-03-23 09:15:25 +08:00
eZio Pan
5d12f59430 stm32 CORDIC: make use of "preload" feature 2024-03-23 09:15:25 +08:00
eZio Pan
a1ca9088b4 stm32 CORDIC: ZeroOverhead q1.31 mode 2024-03-23 09:15:25 +08:00
eZio Pan
b595d94244 stm32 CORDIC: split into multiple files 2024-03-23 09:15:25 +08:00
eZio Pan
cf065d439e stm32 CORDIC: ZeroOverhead q1.31 1 arg 1 res mode 2024-03-23 09:15:25 +08:00
Dario Nieuwenhuis
2bca875b5f stm32: use private_bounds for sealed traits. 2024-03-23 01:38:51 +01:00
Dario Nieuwenhuis
389cbc0a77 stm32/timer: simplify traits, convert from trait methods to struct. 2024-03-23 01:37:28 +01:00
Ralf
08e2ba9d74 STM32 BufferedUart: wake receive task for each received byte 
Fixes https://github.com/embassy-rs/embassy/issues/2719
 2024-03-21 08:35:41 +01:00
René van Dorst
92fa49f502 Also fix time_driver.rs 2024-03-20 20:42:03 +01:00
René van Dorst
ab7c767c46 Bump stm32-data to latest tag. 2024-03-20 20:31:02 +01:00
René van Dorst
fb9d42684b stm32: Fix psc compile error with current stm32-data 
Commit cc525f1b25 has changed the definition of the `psc` register.
Update timer/mod.rs to reflect the stm32-data change.
 2024-03-20 19:59:17 +01:00
Dario Nieuwenhuis
eca9aac194 Fix warnings in recent nightly. 2024-03-20 16:39:09 +01:00
Dario Nieuwenhuis
3d842dac85 fmt: disable "unused" warnings. 2024-03-20 14:53:19 +01:00
Dario Nieuwenhuis
a2fd4d751e stm32/gpio: add missing eh02 InputPin for OutputOpenDrain. 2024-03-20 13:49:19 +01:00
Sebastian Goll
cff665f2ec Avoid unnecessary double-reference 2024-03-20 13:08:42 +01:00
Sebastian Goll
4eb4108952 Fix build for I2C v2 targets 2024-03-20 03:33:15 +01:00
Sebastian Goll
8f19a2b537 Avoid missing stop condition when write/read with empty read buffer 2024-03-20 02:59:30 +01:00
Sebastian Goll
c96062fbcd Implement blocking transaction handling for I2C v1 2024-03-20 02:59:30 +01:00
Sebastian Goll
7c08616c02 Introduce frame options to control start/stop conditions 2024-03-20 02:55:49 +01:00
Dario Nieuwenhuis
d90abb8ac9 stm32/usb: assert usb clock is okay. 2024-03-19 22:10:59 +01:00
Dario Nieuwenhuis
daa64bd540 stm32/usb: extract common init code. 2024-03-19 22:10:59 +01:00
Dario Nieuwenhuis
530ff9d4d3 stm32/usb: merge usb and usb_otg into single module. 2024-03-19 22:07:16 +01:00
Adam Greig
5a879b3ed1
STM32: SAI: Fix MCKDIV for SAI v3/v4 2024-03-19 02:17:50 +00:00
Dario Nieuwenhuis
6d9f87356b
Merge pull request from ExplodingWaffle/peri-clock 
stm32/rcc: wait for peripheral clock to be active. also, hold the peripheral reset while enabling the clock.
 2024-03-18 16:23:28 +00:00
Harry Brooke
1f9ffbfb18 remove peripheral reads 2024-03-18 00:05:02 +00:00
Corey Schuhen
3f5c8784af FDCAN: Fix offset issue preventing CAN2 and CAN3 from working. 
Fix for not H7
 2024-03-16 19:32:38 +10:00
Dario Nieuwenhuis
c580d4c490
Merge pull request from timokroeger/stm32-ucpd 
STM32 UCPD CI Test
 2024-03-15 18:51:09 +00:00
Timo Kröger
21e2499f35 [UCPD] Fix dead-battery disable for G0 
Inverted flag got missed in the original PR.
 2024-03-15 17:44:27 +01:00
Dario Nieuwenhuis
963fda2404
Merge pull request from timokroeger/stm32-ucpd 
STM32 USB Type-C/USB Power Delivery Interface (UCPD)
 2024-03-14 21:21:33 +00:00
Timo Kröger
57ca072dc3 [UCPD] Enable RX PHY only when receiving 2024-03-14 22:05:22 +01:00