The eth code is always built and available, but has no own API (other
than the embassy-net Device impl) to rx/tx packets. We could add this
API in the future, so the feature only means "embassy-net support".
The pool was prone to deadlocks, especially due to having a single pool
for rx+tx. If the pool got full with rx'd packets it would deadlock because
processing a rx packet requires doing another allocation on the pool, for
the possibly tx'd response, before deallocating the rx'd packet.
This also allows Device impls to allocate the packet memory in a particular
RAM kind, if needed for example to do DMA.
The `Device` trait is now token-based, like smoltcp's. In the end, this
is better because it allows callers to manage memory however they want (including
with a pool if they want to).
1105: embassy-rp: Add multicore support r=Dirbaio a=kalkyl
This PR adds multicore support + critical-section impl using hardware spinlocks.
Based on the rp2040-hal implementation.
Co-authored-by: kalkyl <henrik.alser@me.com>
Co-authored-by: Henrik Alsér <henrik.alser@me.com>
1043: Rpi Pico PIO driver r=Dirbaio a=fluffware
This is a driver for the two PIOs in the Pico. I've tried using the type system to get as much compile time checks as possible. There is asynchronous support for FIFOs an Irqs. No DMA support yet. There's an example that shows how to use the driver asynchronously.
1103: embassy-stm32: add rs485 driver enable to uart r=Dirbaio a=FrozenDroid
Co-authored-by: Simon Berg <ksb@fluffware.se>
Co-authored-by: Vincent Stakenburg <v.stakenburg@sinewave.nl>
1051: Adapted nvmc so it can be used for all nrf targets r=diondokter a=diondokter
Title says it all pretty much.
It's a bit annoying with the configs though.
I've made this a draft because I haven't really tested this yet.
Co-authored-by: Dion Dokter <dion@tweedegolf.com>
Co-authored-by: Dion Dokter <diondokter@gmail.com>
1098: Reset sdmmc clock on card init r=Dirbaio a=chemicstry
Set clock back to 400kHz in `init_card()`, which allows card reinitialization if it was removed
Co-authored-by: chemicstry <chemicstry@gmail.com>
1099: rp: implement input for OutputOpenDrain r=Dirbaio a=Dirbaio
Needed for onewire and similar protocols.
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
1089: feat: embassy-boot for rp2040 r=Dirbaio a=lulf
Add embassy-boot support for RP2040, with examples for the Raspberry Pi Pico.
Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
The "must not be called reentrantly" invariant is too "global" to
maintain comfortably, and the cost of the RefCell is negligible,
so this was a case of premature optimization.
1074: Added blinky example for stm32f0 r=lulf a=imrank03
Hi, I have added **blinky** example for `stm32f0` and tested with Nucleo board `STM32F091RC`.
- Can I add more example for stm32f0?
Co-authored-by: @imrank03 <immu0396@gmail.com>
1082: stm32: Add basic support for DMA priority settings r=lulf a=matoushybl
This adds very basic support for specifying priority for DMA interrupts. Unfortunately, the patch now doesn't allow for specifying different priorities for DMA1/DMA2, or BDMA1/BDMA2, which I didn't know how to support.
1083: stm32: Fix H7 unaligned erase r=lulf a=matoushybl
This PR simplifies erasing sectors on the H7, which was buggy.
Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
1088: stm32: Enable fifo for buffered uart r=lulf a=matoushybl
This PR enables fifo for buffered uart where it is available. This should hopfully get rid of some overrun errors. I tried it in my application where it worked, but more intensive testing is probably required.
Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
1086: rp: Add an RngCore impl based on ROSC.RANDOMBIT r=Dirbaio a=yodaldevoid
This has the potential to not be random, but it should not be an issue if default clock settings are used.
Co-authored-by: Gabriel Smith <ga29smith@gmail.com>
