Grant Miller
87a52f5ead
stm32/usart: Add doc links to buffered uarts
2024-02-03 17:04:20 -06:00
Stefan Gehr
b9d0069671
correct spelling of the word "receive"
2024-02-03 14:56:31 +01:00
Dario Nieuwenhuis
9866847375
stm32: autogenerate clocks struct, enable mux for all chips.
2024-02-02 23:24:34 +01:00
Dario Nieuwenhuis
a099084bff
Merge pull request #2520 from Ecco/stm32wba-rcc-v3
...
Migrate STM32WBA to RCCv3
2024-02-02 20:48:39 +00:00
Romain Goyet
92690d8590
Migrate STM32WBA to RCCv3
2024-02-02 14:12:26 -05:00
Dario Nieuwenhuis
e05c8e2f44
stm32/dac: use autogenerated RCC impls.
2024-02-01 23:47:30 +01:00
Joonas Javanainen
7e0f287431
Fix ADC max frequency for F2
2024-02-01 21:58:36 +02:00
Joonas Javanainen
21024e8638
Fix F2 temperature sensor ADC channel
...
On all F2 devices (F205/207/215/217) the sensor is connected to
ADC1_IN16, and is not shared with VBAT which is connected to ADC1_IN18.
2024-02-01 21:48:29 +02:00
Romain Goyet
aa767272a8
STM32WBA's high speed external clock has to run at 32 MHz
2024-02-01 13:42:48 -05:00
Dario Nieuwenhuis
7e02389995
Merge pull request #2410 from eZioPan/waveform-on-CHx
...
impl waveform with TIM OC Channel DMA
2024-02-01 01:02:01 +00:00
Dario Nieuwenhuis
e613324e16
stm32/eth: rename new_rmii to new, update metapac to fix issues with PC2_C.
2024-02-01 01:39:52 +01:00
Simon B. Gasse
42d8f3930a
Implement MII interface
...
- Extend the eth/v2 module to support MII besides RMII.
- Replace `Ethernet::new` with `Ethernet::new_mii` and
`Ethernet::new_rmii`.
- Update ethernet examples.
- Add example for MII ethernet.
2024-02-01 01:33:34 +01:00
Corey Schuhen
1de78d0490
Initial FDCAN driver implementation.
...
Original author:
Torin Cooper-Bennun <tcbennun@maxiluxsystems.com>
Cleanup and documentaion by:
Tomasz bla Fortuna <bla@reactor.local>
Corey Schuhen <cschuhen@gmail.com>
Use new PAC method now that the names are common.
Use broken out definitions that can be shared with bxcan
Populate Rx struct with an embassy timestamp.
Remove use of RefCell.
As per review comment. - THis will probably get squashed down.
Fix
2024-01-31 05:40:05 +10:00
Tomasz bla Fortuna
03ba45065e
Add FDCAN clock registers to G4 RCC.
...
Author: Adam Morgan <adam@luci.com>
Break definitions out of bxcan that can be used innm fdcan.
Typo
2024-01-31 05:40:05 +10:00
Dario Nieuwenhuis
3387ee7238
stm32/gpio: remove generics.
2024-01-22 21:31:06 +01:00
Dario Nieuwenhuis
43b6258a69
Merge pull request #2416 from andresv/stm32-fix-buffered-uart-flush
...
stm32: fix buffered uart flush
2024-01-20 01:50:55 +00:00
Dario Nieuwenhuis
67159d80bb
Merge pull request #2429 from jr-oss/stm32_simple_pwm_add_set_output_compare_mode
...
stm32/simple_pwm: add set_output_compare_mode
2024-01-20 01:33:49 +00:00
Dario Nieuwenhuis
326bff322e
Merge pull request #2415 from hdoordt/patch-1
...
Make adc::Resolution::to_max_count const
2024-01-20 01:31:22 +00:00
Andres Vahter
ec2e3de0f4
stm32 uart: fix buffered flush for usart_v1, usart_v2
...
There is one caveat. For some reason with first send using usart_v1/usart_v2 TC flag appears right after first byte from buffer is written to DR. Consecutive transfers work as expected - TC flag appears when last byte is fully transferred to wire.
2024-01-20 00:15:40 +01:00
Andres Vahter
534c53c901
stm32 uart: remove unwrap
...
unwraps take more space because of panics
2024-01-20 00:15:40 +01:00
Andres Vahter
c936d66934
stm32 uart: fix flush for non usart_v4 variants
...
Byte was written to TDR and right after that waker was called. This means `flush` would see that `tx_buf` is empty and can return Ready although actually hardware was still writing this last byte to the wire.
With this change non `usart_v4 ` variants would also use TC interrupt to check when last byte was sent out.
2024-01-20 00:15:39 +01:00
Andres Vahter
17d6e4eefe
stm32 uart: do not wake after sending each byte
...
usart_v4 uses TC interrupt to see if all bytes are sent out from the FIFO and waker is called from this interrupt. This minimises unnecessary wakeups during sending.
2024-01-20 00:15:39 +01:00
Andres Vahter
ec47e931ac
stm32: fix buffered uart flush
...
usart_v4 uses internal FIFO and therefore actually all bytes are not yet sent out although state.tx_buf.is_empty()
2024-01-20 00:15:39 +01:00
Harry Brooke
d781e231cd
make usart::State private
2024-01-19 23:20:20 +01:00
Dario Nieuwenhuis
9cd0beaee3
Merge pull request #2450 from shufps/feat/timer-driver-tim22-tim23
...
adds timer-driver for tim21 and tim22 (on L0)
2024-01-15 12:01:22 +01:00
shufps
e969b88e5a
fixed trailing white spaces
2024-01-15 11:23:41 +01:00
shufps
4e2361c024
adds timer-driver for tim21 and tim22 (on L0)
2024-01-15 08:11:22 +01:00
Dario Nieuwenhuis
583555bc8a
Suppress "unused" warnings.
2024-01-14 23:20:51 +01:00
shufps
018c48cf1c
changes to get usb working on a L1. Adds a usb_serial example too
2024-01-14 22:43:22 +01:00
Dario Nieuwenhuis
9f6517e408
stm32,nrf: add warning on docs.rs directing the user to docs.embassy.dev.
2024-01-11 23:43:17 +01:00
Barnaby Walters
557399e2d6
Included README.md in docs
2024-01-11 20:00:33 +01:00
Dario Nieuwenhuis
15f94fb0fc
time: split driver into a separate embassy-time-driver crate.
2024-01-11 16:56:08 +01:00
Ralf
db776c9623
stm32/simple_pwm: add set_output_compare_mode
2024-01-10 18:48:26 +01:00
Dario Nieuwenhuis
3bc6e414f7
stm32: update metapac.
2024-01-10 18:06:47 +01:00
Dario Nieuwenhuis
495b8b739a
Change GPIO inherent methods back to &self.
...
With the embedded-hal rc3 update I changed them to require `&mut self`, but
in retrospect I think `&self` is better, for extra flexibility.
This PR reverts the changes from the rc3 update to inherent methods.
2024-01-10 00:00:10 +01:00
Dario Nieuwenhuis
c9ac39df94
Update embedded-hal to v1.0
2024-01-09 23:37:14 +01:00
Henk Oordt
45b7645525
Make adc::Resolution::to_max_count const
2024-01-08 13:56:21 +01:00
eZio Pan
b16cc04036
bug fix
2024-01-08 19:18:24 +08:00
eZio Pan
890a1269d0
refactor with clippy
2024-01-06 22:48:21 +08:00
eZio Pan
424ddaf3d9
impl waveform with TIM Channel
2024-01-06 22:22:38 +08:00
Dario Nieuwenhuis
294046cddb
Merge pull request #2405 from Sizurka/stm32g0-usb
...
stm32: Add G0 USB RCC and example
2024-01-06 00:03:54 +00:00
Dario Nieuwenhuis
208ad8fbfc
stm32/flash: add support for f1.
2024-01-05 23:49:10 +01:00
Derek Hageman
801a36c7b4
stm32: Add G0 USB RCC
...
Add configuration for STM32G0 USB clock.
2024-01-05 07:56:22 -07:00
Dario Nieuwenhuis
03ba4ae386
stm32: update metapac.
2024-01-03 18:39:22 +01:00
Tyler Gilbert
7944e854dd
Fix formatting of comments
2024-01-03 11:07:57 -06:00
Tyler
727906fa04
Update u5.rs
...
Update comments on p and q divider values to correctly describe what the clock outputs are used for.
2024-01-03 11:04:48 -06:00
Tyler Gilbert
31bf127807
Update STM32 RCC U5 to support P and Q dividers
2024-01-03 10:46:45 -06:00
Adin Ackerman
d372cba266
additional chip variants required more clocks
2024-01-02 16:25:51 -08:00
Adin Ackerman
34713b4910
fix g0 being left out of some clock controls
2024-01-02 16:03:23 -08:00
Christian Enderle
7f00d7aa0c
allow unused variable
2024-01-02 23:29:33 +01:00
