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2196 commits

Author SHA1 Message Date
Torin Cooper-Bennun
a8da42943f stm32: can: fd: rm some irrelevant commented code and dead code 2024-02-27 23:47:41 +00:00
Torin Cooper-Bennun
0ed402fd79 stm32: can: fd: refactor out some duplicate code 2024-02-27 23:47:25 +00:00
Maia
b7e0964a07 added FDCANSEL logic for H7 2024-02-27 11:07:05 -08:00
Dario Nieuwenhuis
62c5df7e5b
Merge pull request from MaxiluxSystems/small-fdcan-fixes 
stm32: can: fd: fix SID read/write and BRS setting for TX
 2024-02-27 12:19:03 +00:00
Torin Cooper-Bennun
9a4f58fe15 stm32: can: fd: only TX with BRS if also TXing with FDF 2024-02-27 10:38:40 +00:00
Torin Cooper-Bennun
e63b0d7a2f stm32: can: fd: fix SID read/write from buf elems 2024-02-27 10:38:07 +00:00
eZio Pan
bf44adc4bc allow higher psc value for iwdg_v3 2024-02-27 14:20:58 +08:00
Dario Nieuwenhuis
d5a2b3be58
Merge pull request from MaxiluxSystems/time_driver_tim1 
stm32: time_driver: allow use of TIM1 for driver
 2024-02-26 12:08:32 +00:00
Torin Cooper-Bennun
5c45723777 stm32: timers: use TIMx_CC interrupt source for advanced timers 
fixes (hopefully) time driver when using TIM1/8/20
 2024-02-26 10:03:51 +00:00
Caleb Garrett
29d0d80808
Merge branch 'main' into cryp 2024-02-25 21:21:21 -05:00
Dario Nieuwenhuis
c83ab20526 stm32: update metapac. 2024-02-26 03:02:58 +01:00
Dario Nieuwenhuis
72c6f9a101 stm32/adc: reexport enums from PAC to avoid boilerplate hell. 2024-02-26 03:02:58 +01:00
Caleb Garrett
d9c0da8102 Update metapac to address CI build issue. 2024-02-25 20:59:07 -05:00
Caleb Garrett
236fc6f650 Add CRYP test. 2024-02-25 20:59:07 -05:00
Caleb Garrett
f352b6d68b Address CI build issues. 2024-02-25 20:59:07 -05:00
Caleb Garrett
25ec838af5 Correct AAD ingest. 2024-02-25 20:59:07 -05:00
Caleb Garrett
967b4927b0 Correct tag generation. 2024-02-25 20:59:07 -05:00
Caleb Garrett
cbca3a5c9f Support v1 and v2 cryp variants. 2024-02-25 20:59:07 -05:00
Caleb Garrett
29d8b45956 Add DES and TDES support. Support variable tag sizes. 2024-02-25 20:59:07 -05:00
Caleb Garrett
14c2c28e06 Corrected additional associated data operation. 2024-02-25 20:59:07 -05:00
Caleb Garrett
f64a62149e Corrected CCM partial block ops. 2024-02-25 20:59:07 -05:00
Caleb Garrett
1e21b758f7 Corrected GCM tag generation. 2024-02-25 20:59:07 -05:00
Caleb Garrett
690b2118c6 CCM mode functional. 2024-02-25 20:59:07 -05:00
Caleb Garrett
fec26e8960 Refactored ciphers into traits. 2024-02-25 20:59:07 -05:00
Caleb Garrett
c2b03eff62 GCM mode functional. 2024-02-25 20:59:07 -05:00
Caleb Garrett
565acdf243 CTR mode functional. 2024-02-25 20:59:07 -05:00
Caleb Garrett
72e4cacd91 CBC and ECB AES modes functional. 2024-02-25 20:59:07 -05:00
Caleb Garrett
a0a8a4ec86 Support CBC, ECB, CTR modes. 2024-02-25 20:59:07 -05:00
Caleb Garrett
79e5e8b052 Add cryp configuration. 2024-02-25 20:59:07 -05:00
Dario Nieuwenhuis
a308b9ac2f Merge branch 'adc_h5' into add-pll1_p_mul_2-clock 2024-02-26 02:14:38 +01:00
Eli Orona
abde7891e3 Update metapac version 2024-02-25 16:44:46 -08:00
Eli Orona
2dfd66b7c4 🤦 2024-02-25 16:25:42 -08:00
Eli Orona
7dbae799dc Rust FMT 2024-02-25 16:24:52 -08:00
Eli Orona
c23b59bdc8 Add pll1_p_mul_2 clock. 2024-02-25 16:12:32 -08:00
Dario Nieuwenhuis
489d0be2a2 stm32/rcc: unify naming sysclk field to sys, enum to Sysclk. 2024-02-26 00:00:17 +01:00
Dario Nieuwenhuis
497515ed57
Merge pull request from OroArmor/tim_pll_clk 
Enable PLL Clocks for TIMx peripherals on STM32F3xx Chips
 2024-02-25 22:45:48 +00:00
Corey Schuhen
a737a7350e FDCAN: Remove history from comments. 2024-02-25 10:14:12 +10:00
Corey Schuhen
1327a644b6 FDCAN: Don't require internal module for public API. 2024-02-25 10:14:12 +10:00
Corey Schuhen
0565098b06 FDCAN: Fix some indenting in macros 2024-02-25 10:14:12 +10:00
Corey Schuhen
a061cf3133 FDCAN: Allow access to buffered senders and receivers. 2024-02-25 10:14:12 +10:00
Corey Schuhen
779898c0e7 FDCAN: Expose some pub types in API 2024-02-25 10:14:12 +10:00
Corey Schuhen
2d634d07e0 FDCAN: Remove extra traits from. 
Comments

Fix.
 2024-02-25 10:13:58 +10:00
Eli Orona
394abda092 Fix report with the same name 2024-02-24 12:58:38 -08:00
Eli Orona
e79d2dd756 Move to internal mod and re-export the enums 2024-02-24 12:54:58 -08:00
Dario Nieuwenhuis
e67dfcb04f stm32/dma: add AnyChannel, add support for BDMA on H7. 2024-02-24 02:41:41 +01:00
Torin Cooper-Bennun
86ccf0bc3e stm32: remove TIM11 as time driver candidate (only 1 CC channel) 2024-02-23 14:35:12 +00:00
Torin Cooper-Bennun
44534abf32 stm32: sync available TIMs in Cargo.toml, build.rs 2024-02-23 14:35:12 +00:00
Torin Cooper-Bennun
a11e3146f8 stm32: time_driver: allow use of TIM1 for driver 2024-02-23 14:35:12 +00:00
Dario Nieuwenhuis
f77d59500e
Merge pull request from barnabywalters/g4rcc 
[embassy-stm32] G4 RCC refactor amendments and additions
 2024-02-23 13:05:01 +00:00
Barnaby Walters
b091ffcb55 [embassy-stm32] G4 RCC refactor amendments and additions 
* Added assertions for a variety of clock frequencies, based on the reference manual and
  stm32g474 datasheet. The family and numbers are consistent enough that I’m assuming
  these numbers will work for the other chips.
* Corrected value of pll1_q in set_clocks call, added pll1_r value
 2024-02-23 01:59:24 +01:00