Corey Schuhen
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df8f508ffa
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Writing to TX buffer also needs to fire an interrupt to kick off transmission if it is idle.
Formatting
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2024-03-02 09:09:27 +10:00 |
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Dario Nieuwenhuis
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d5c9c611fa
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Merge pull request #2619 from caleb-garrett/cryp
STM32 Crypto Accelerator
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2024-03-01 19:35:57 +00:00 |
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Siebe Claes
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96af20cf5b
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stm32: can: fd: Fix Frame is_extended() function
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2024-03-01 19:21:01 +01:00 |
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Caleb Garrett
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c9cca3c007
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Fix H7 CRYP operation.
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2024-02-29 19:09:44 -05:00 |
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Caleb Garrett
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998532c33e
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Merge branch 'embassy-rs:main' into cryp
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2024-02-29 15:21:06 -05:00 |
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Dario Nieuwenhuis
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263d1b024c
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Merge pull request #2637 from cschuhen/feature/fix_buf_size
Buffer is not big enough for FD frames.
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2024-02-28 17:33:58 +00:00 |
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eZio Pan
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47c579eba2
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update metapac
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2024-02-29 00:11:40 +08:00 |
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Corey Schuhen
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1353a343b8
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Buffer is not big enough for FD frames.
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2024-02-28 18:03:53 +10:00 |
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Dario Nieuwenhuis
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5ced938184
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Merge pull request #2634 from maiaherringfish/stm32h7-fdcansel-fix
adding FDCANSEL logic for STM32H7x
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2024-02-28 00:54:43 +00:00 |
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Torin Cooper-Bennun
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a8da42943f
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stm32: can: fd: rm some irrelevant commented code and dead code
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2024-02-27 23:47:41 +00:00 |
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Torin Cooper-Bennun
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0ed402fd79
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stm32: can: fd: refactor out some duplicate code
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2024-02-27 23:47:25 +00:00 |
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Maia
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b7e0964a07
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added FDCANSEL logic for H7
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2024-02-27 11:07:05 -08:00 |
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Dario Nieuwenhuis
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62c5df7e5b
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Merge pull request #2631 from MaxiluxSystems/small-fdcan-fixes
stm32: can: fd: fix SID read/write and BRS setting for TX
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2024-02-27 12:19:03 +00:00 |
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Torin Cooper-Bennun
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9a4f58fe15
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stm32: can: fd: only TX with BRS if also TXing with FDF
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2024-02-27 10:38:40 +00:00 |
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Torin Cooper-Bennun
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e63b0d7a2f
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stm32: can: fd: fix SID read/write from buf elems
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2024-02-27 10:38:07 +00:00 |
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eZio Pan
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bf44adc4bc
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allow higher psc value for iwdg_v3
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2024-02-27 14:20:58 +08:00 |
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Dario Nieuwenhuis
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d5a2b3be58
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Merge pull request #2614 from MaxiluxSystems/time_driver_tim1
stm32: time_driver: allow use of TIM1 for driver
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2024-02-26 12:08:32 +00:00 |
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Torin Cooper-Bennun
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5c45723777
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stm32: timers: use TIMx_CC interrupt source for advanced timers
fixes (hopefully) time driver when using TIM1/8/20
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2024-02-26 10:03:51 +00:00 |
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Caleb Garrett
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29d0d80808
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Merge branch 'main' into cryp
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2024-02-25 21:21:21 -05:00 |
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Dario Nieuwenhuis
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c83ab20526
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stm32: update metapac.
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2024-02-26 03:02:58 +01:00 |
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Dario Nieuwenhuis
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72c6f9a101
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stm32/adc: reexport enums from PAC to avoid boilerplate hell.
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2024-02-26 03:02:58 +01:00 |
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Caleb Garrett
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d9c0da8102
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Update metapac to address CI build issue.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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236fc6f650
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Add CRYP test.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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f352b6d68b
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Address CI build issues.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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25ec838af5
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Correct AAD ingest.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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967b4927b0
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Correct tag generation.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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cbca3a5c9f
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Support v1 and v2 cryp variants.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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29d8b45956
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Add DES and TDES support. Support variable tag sizes.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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14c2c28e06
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Corrected additional associated data operation.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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f64a62149e
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Corrected CCM partial block ops.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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1e21b758f7
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Corrected GCM tag generation.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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690b2118c6
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CCM mode functional.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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fec26e8960
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Refactored ciphers into traits.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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c2b03eff62
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GCM mode functional.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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565acdf243
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CTR mode functional.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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72e4cacd91
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CBC and ECB AES modes functional.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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a0a8a4ec86
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Support CBC, ECB, CTR modes.
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2024-02-25 20:59:07 -05:00 |
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Caleb Garrett
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79e5e8b052
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Add cryp configuration.
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2024-02-25 20:59:07 -05:00 |
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Dario Nieuwenhuis
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a308b9ac2f
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Merge branch 'adc_h5' into add-pll1_p_mul_2-clock
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2024-02-26 02:14:38 +01:00 |
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Eli Orona
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abde7891e3
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Update metapac version
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2024-02-25 16:44:46 -08:00 |
|
Eli Orona
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2dfd66b7c4
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🤦
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2024-02-25 16:25:42 -08:00 |
|
Eli Orona
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7dbae799dc
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Rust FMT
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2024-02-25 16:24:52 -08:00 |
|
Eli Orona
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c23b59bdc8
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Add pll1_p_mul_2 clock.
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2024-02-25 16:12:32 -08:00 |
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Dario Nieuwenhuis
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489d0be2a2
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stm32/rcc: unify naming sysclk field to sys, enum to Sysclk.
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2024-02-26 00:00:17 +01:00 |
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Dario Nieuwenhuis
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497515ed57
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Merge pull request #2583 from OroArmor/tim_pll_clk
Enable PLL Clocks for TIMx peripherals on STM32F3xx Chips
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2024-02-25 22:45:48 +00:00 |
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Corey Schuhen
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a737a7350e
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FDCAN: Remove history from comments.
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2024-02-25 10:14:12 +10:00 |
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Corey Schuhen
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1327a644b6
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FDCAN: Don't require internal module for public API.
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2024-02-25 10:14:12 +10:00 |
|
Corey Schuhen
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0565098b06
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FDCAN: Fix some indenting in macros
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2024-02-25 10:14:12 +10:00 |
|
Corey Schuhen
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a061cf3133
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FDCAN: Allow access to buffered senders and receivers.
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2024-02-25 10:14:12 +10:00 |
|
Corey Schuhen
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779898c0e7
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FDCAN: Expose some pub types in API
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2024-02-25 10:14:12 +10:00 |
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