Barnaby Walters
b091ffcb55
[embassy-stm32] G4 RCC refactor amendments and additions
...
* Added assertions for a variety of clock frequencies, based on the reference manual and
stm32g474 datasheet. The family and numbers are consistent enough that I’m assuming
these numbers will work for the other chips.
* Corrected value of pll1_q in set_clocks call, added pll1_r value
2024-02-23 01:59:24 +01:00
Dario Nieuwenhuis
a6a5d9913c
Merge branch 'main' into stm32l0-reset-rtc
2024-02-23 01:45:10 +01:00
Dario Nieuwenhuis
0665e0d452
stm32/rcc: port U5 to new API, add all PLLs, all HSE modes.
2024-02-23 01:24:05 +01:00
Dario Nieuwenhuis
4481c5f3cc
Merge pull request #2616 from embassy-rs/h5-stupid-errata
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stm32/rcc: workaround nonsense RAM suicide errata on backup domain reset.
2024-02-23 00:25:30 +01:00
Dario Nieuwenhuis
475dea0208
stm32/rcc: workaround nonsense RAM suicide errata on backup domain reset.
2024-02-23 00:18:24 +01:00
Dario Nieuwenhuis
9c918f6474
Merge pull request #2588 from cschuhen/feature/fdcan_buffered
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Add FDCAN Buffered mode.
2024-02-23 00:07:05 +01:00
Torin Cooper-Bennun
5d2ccc8fa7
adc: basic H5 support
2024-02-22 15:50:13 +00:00
Eli Orona
88e29608ed
Rust fmt
2024-02-20 17:59:51 -08:00
Eli Orona
2ee9b37373
Move to a single Mux Struct.
2024-02-20 17:54:35 -08:00
Joonas Javanainen
9b2d096f4f
USB needs PWR_CR2 USV set on STM32L4
...
Confirmed to be needed on an STM32L422, and based on a quick look at
L4/L4+ reference manuals, this bit is present and required to be set on
all L4 chips that have some kind of USB peripheral (USB or OTG_FS).
The `usb_otg` driver already sets it for `cfg(stm32l4)` and we should do
the same thing here.
2024-02-20 21:47:13 +02:00
Dario Nieuwenhuis
55187c7276
Merge pull request #2602 from embassy-rs/peripheralref-no-derefmut
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hal-internal: remove impl DerefMut for PeripheralRef.
2024-02-20 13:51:01 +00:00
Dario Nieuwenhuis
e8474426d8
hal-internal: remove impl DerefMut for PeripheralRef.
...
if you have `PeripheralRef<'a, AnyPIn>` for pin A, and `AnyPin` (owned) for pin B, you can `mem::swap` them.
so, getting access forever to pin A, just by "sacrificing" pin B
this defeats the point of PeripheralRef, which is if you got a `PeripheralRef<'a, T>` then you're only allowed to use the peripheral for `'a`.
Also some drivers rely on the fact only one instance of a singleton exists for soundness, so this is a soundness fix for those.
2024-02-20 01:02:15 +01:00
Torin Cooper-Bennun
67230dc444
flash: h50: first pass at implementation
2024-02-19 16:05:50 +00:00
fe1es
5b7e2d8826
stm32/rcc: reset RTC on stm32l0
2024-02-19 15:25:24 +09:00
Corey Schuhen
eafa90cd07
Remove the OperatingMode typestates
...
Instead have two explcit types(without the mode generic arg)types:
- One for config
- One for all operating modes
2024-02-18 13:09:37 +10:00
Zach
dd9f0d9d9e
support u5 flash
2024-02-17 12:04:53 -06:00
Corey Schuhen
5ad291b708
Add a buffered mode.
2024-02-17 18:26:57 +10:00
Corey Schuhen
91c75c92a0
Clean up and prep for buffered IRQ mode.
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- Reduce code duplicaiton in read/write methods
- General clean-up
- Prepare for buffered mode
2024-02-17 18:26:57 +10:00
Corey Schuhen
5d8c54fdea
Move error conversion to peripheral.rs
2024-02-17 18:25:58 +10:00
Corey Schuhen
200ace566f
Don't use word Standard for frame format because it can be confused with ID format. Use Classic instead to mean CAN 2.0B frames.
2024-02-17 18:25:58 +10:00
Corey Schuhen
70b3c4374d
Port FDCAN HAL to use PAC directly instead of fdcan crate.
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- Provide separate FDCAN capable and Classic CAN API's
- Don't use fdcan crate dep anymore
- Provide embedded-can traits.
2024-02-17 18:25:58 +10:00
Eli Orona
e99ef49611
Move to auto-generated based system.
2024-02-16 19:57:00 -08:00
Dario Nieuwenhuis
a3f508e6d1
Merge pull request #2570 from eZioPan/time-driver-singleton
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Add missing TIM for time-driver; reorder time-driver selection when use "time-drvier-any"
2024-02-17 02:34:45 +00:00
Eli Orona
c99c4a01a9
Update f013.rs
2024-02-16 16:47:38 -08:00
Eli Orona
7592e8be6e
Fix build
2024-02-16 16:45:58 -08:00
Eli Orona
77739faaeb
Rustfmt
2024-02-16 16:42:19 -08:00
Eli Orona
370db9fb06
Update f013.rs
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Add stm32f398
2024-02-16 16:39:23 -08:00
Dario Nieuwenhuis
9352621058
Merge pull request #2579 from barnabywalters/g4rcc
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[embassy-stm32]: stm32g4 RCC refactor
2024-02-16 23:38:49 +00:00
Barnaby Walters
6d7458dac7
Refinements
...
* Implemented boost mode dance (RM0440 p234-245, 6.5.1)
* Enabled boost mode in usb_serial example, tested on hardware
* Removed hard requirement of a valid 48MHz source (HSI48 is checked if
requested, PLL passed through as-is and assumed to be valid)
* Used calc_pclk to calculate APB frequencies
* Refactored 48MHz configuration code to remove unnecessary let and block
* Renamed ahb_freq to hclk for clarity and consistency
2024-02-17 00:30:16 +01:00
Barnaby Walters
a24087c36c
Configured SYSCLK after boost mode, added comments
2024-02-16 21:52:58 +01:00
Barnaby Walters
e465dacf73
Added documentation, fixed and refined boost and flash read latency config
2024-02-16 21:34:12 +01:00
Barnaby Walters
25a95503f6
Configured HSI48 if enabled, assert is enabled if chosen as clk48 source
2024-02-16 20:41:04 +01:00
Barnaby Walters
ae74833999
Removed redundant HSI48 configuration
2024-02-16 20:32:35 +01:00
Barnaby Walters
32e4c93954
Removed dangling doc comments
2024-02-16 19:58:19 +01:00
Eli Orona
d7623c7929
Remove extraneous , in cfg
2024-02-15 23:20:35 -08:00
Eli Orona
d28ba1d606
rustfmt
2024-02-15 23:16:17 -08:00
Eli Orona
56b345c722
Clean up register setting
2024-02-15 23:12:18 -08:00
Eli Orona
4408c169a5
Fix cfg lines
2024-02-15 22:55:11 -08:00
Eli Orona
029d6383b5
Rust fmt and fix build.
2024-02-15 20:02:25 -08:00
Eli Orona
169f1ce928
I believe that this enables the PLL clock input to different TIMs for the STM32F3xx Series of chips.
2024-02-15 19:50:42 -08:00
Dario Nieuwenhuis
ae02467434
stm32: update metapac.
2024-02-16 02:07:21 +01:00
Barnaby Walters
396041ad1a
Commented out currently unused constants
2024-02-16 00:04:35 +01:00
Barnaby Walters
5b7eff6541
[embassy-stm32]: started stm32g4 RCC refactor
...
* Copied API from f.rs where applicable
* HSE and HSI independantly configurable
* Boost mode set by user rather
* Added HSE, pll1_q and pll1_p frequencies to set_clocks call
* Stubbed max module based on f.rs, needs cleanup
2024-02-15 23:56:26 +01:00
Dario Nieuwenhuis
5220453d85
Merge pull request #2564 from embassy-rs/rcc-f1-update
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stm32/rcc: port F1, F0 to new API.
2024-02-14 16:40:11 +00:00
Dario Nieuwenhuis
1860e22693
stm32/rcc: unify f0, f1, f3.
2024-02-14 17:24:20 +01:00
eZio Pan
bbe1eebc53
Add missing TIM for time-driver; reorder time-driver selection when use "time-drvier-any".
2024-02-14 17:43:46 +08:00
Michael de Silva
0ceb313b6f
FIX: Correct typo in stm32 gpio
2024-02-14 07:22:52 +05:30
Caleb Garrett
14a678fe45
Fixed HMAC blocking mode.
2024-02-12 20:33:04 -05:00
Caleb Garrett
d8b4922b3c
Add STM32 HMAC function.
2024-02-12 20:33:04 -05:00
Dario Nieuwenhuis
8c82d1bcbc
Merge pull request #2528 from caleb-garrett/hash
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STM32 Hash Accelerator
2024-02-13 01:36:11 +01:00
Dario Nieuwenhuis
ccd2c574c3
stm32/rcc: port F0 to new API.
2024-02-13 01:21:51 +01:00
Dario Nieuwenhuis
b7c147445a
stm32/rcc: port F1 to new API.
2024-02-13 01:21:51 +01:00
Dario Nieuwenhuis
739c69bd63
stm32/rcc: some f3 fixes.
2024-02-13 01:15:54 +01:00
Dario Nieuwenhuis
937a9e7955
stm32/rcc: use h7 sdlevel enum from pac.
2024-02-12 20:58:04 +01:00
Dario Nieuwenhuis
0dc5e6d3e4
stm32/rcc: port F3 RCC to new API
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See #2515
2024-02-12 02:19:31 +01:00
Caleb Garrett
eb64d71247
Consolidated hash drivers.
2024-02-11 11:32:29 -05:00
eZio Pan
b4399a1bf5
timer-doc-fix
2024-02-10 16:22:36 +08:00
Dario Nieuwenhuis
832776d2c7
stm32: update metapac.
2024-02-10 02:50:35 +01:00
Caleb Garrett
0c9661a661
Merge branch 'main' into hash
2024-02-09 19:24:19 -05:00
eZio Pan
8fd803a5fe
use cfg_if to reduce macro condition
2024-02-10 00:00:43 +01:00
eZio Pan
0f94006be3
doc fix
2024-02-10 00:00:43 +01:00
eZio Pan
6c690ab259
restore original public API of timer, but keep new PAC
2024-02-10 00:00:43 +01:00
eZio Pan
b3cdf3a040
bug fix
2024-02-10 00:00:43 +01:00
eZio Pan
319f10da5d
stm32-timer: filter out c0, f1 and f37x
2024-02-10 00:00:43 +01:00
eZio Pan
5b646bc3bd
stm32-timer: L0 is special
2024-02-10 00:00:43 +01:00
eZio Pan
d538829f2f
add methods with macro
2024-02-10 00:00:43 +01:00
Dario Nieuwenhuis
53bf0332e9
asdkf
2024-02-10 00:00:43 +01:00
eZio Pan
dc4898ca89
update timer mod after stm32-metapac timer_v2
2024-02-09 23:58:13 +01:00
eZio Pan
d6636ca116
minor fix
2024-02-09 23:57:09 +01:00
Dario Nieuwenhuis
04147b4147
Merge pull request #2544 from shufps/feat/adc-l0
...
Feat/adc l0
2024-02-09 22:48:57 +00:00
Ulf Lilleengen
1641f8a27e
Merge pull request #2397 from tyler-gilbert/add-write-immediate-api-dma-ring-buffer
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Add write_immediate() function to STM32 DMA ringbufer API
2024-02-09 20:05:41 +00:00
Caleb Garrett
f6645750c9
Removed hash DMA from unsupported configs.
2024-02-08 17:24:27 -05:00
shufps
34c71b58cf
made adc example working with default clock configuration and switched in v1 to PCLK/2 per default
2024-02-08 11:28:53 +01:00
shufps
dabe48c3bd
fmt
2024-02-08 11:15:28 +01:00
shufps
8d0a9bbefb
clippy
2024-02-08 11:14:14 +01:00
shufps
ab8f25fd78
added support for ADC of L0s
2024-02-08 10:47:26 +01:00
Caleb Garrett
bfa67c2993
Fix digest interrupt enable.
2024-02-06 18:37:48 -05:00
Dario Nieuwenhuis
2c5426aa5c
Merge pull request #2539 from badrbouslikhin/stm32h7-flash-improvements
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fix(stm32h7/flash): enhance resilience to program sequence errors (pgserr)
2024-02-06 15:58:50 +00:00
Caleb Garrett
b7db75adff
Updated stm32-metapac.
2024-02-06 10:44:52 -05:00
Badr Bouslikhin
aab5da1d3b
fix(stm32h7/flash): enhance resilience to program sequence errors (pgserr)
2024-02-06 12:30:04 +01:00
Badr Bouslikhin
e72cc9fb24
fix(stm32/h7): use correct unit in vco clock check
2024-02-06 11:33:39 +01:00
Dario Nieuwenhuis
e25eb6ca59
Merge pull request #2529 from GrantM11235/buffered-uart-doc-links
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stm32/usart: Add doc links to buffered uarts
2024-02-04 23:29:27 +01:00
Caleb Garrett
e1f6f4b31d
Merge branch 'main' into hash
2024-02-04 17:24:11 -05:00
Caleb Garrett
059d8a8222
Merge commit '1f940bf9e868438090ea126eb2267f5e9325fbd4' into hash
2024-02-04 17:19:15 -05:00
Caleb Garrett
66f44b95d7
Addressed hash CI build issues.
2024-02-04 17:16:33 -05:00
Dario Nieuwenhuis
6c72638ed0
stm32/rcc: fix more build failures.
2024-02-04 22:47:29 +01:00
Dario Nieuwenhuis
e3fe08428f
stm32/rcc: fix build for some f0 and l4 chips.
...
Fixes #2531
2024-02-04 22:07:17 +01:00
Grant Miller
87a52f5ead
stm32/usart: Add doc links to buffered uarts
2024-02-03 17:04:20 -06:00
Caleb Garrett
1f940bf9e8
Merge branch 'main' into hash
2024-02-03 17:28:20 -05:00
Caleb Garrett
72bbfec39d
Added hash DMA implementation.
2024-02-03 16:10:00 -05:00
Stefan Gehr
b9d0069671
correct spelling of the word "receive"
2024-02-03 14:56:31 +01:00
Dario Nieuwenhuis
9866847375
stm32: autogenerate clocks struct, enable mux for all chips.
2024-02-02 23:24:34 +01:00
Dario Nieuwenhuis
a099084bff
Merge pull request #2520 from Ecco/stm32wba-rcc-v3
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Migrate STM32WBA to RCCv3
2024-02-02 20:48:39 +00:00
Romain Goyet
92690d8590
Migrate STM32WBA to RCCv3
2024-02-02 14:12:26 -05:00
Dario Nieuwenhuis
e05c8e2f44
stm32/dac: use autogenerated RCC impls.
2024-02-01 23:47:30 +01:00
Caleb Garrett
1027530902
Added hash interrupts for async.
2024-02-01 17:27:25 -05:00
Dario Nieuwenhuis
e7d1119750
stm32: automatically use refcounting for rcc bits used multiple times.
2024-02-01 23:15:17 +01:00
Joonas Javanainen
7e0f287431
Fix ADC max frequency for F2
2024-02-01 21:58:36 +02:00
Joonas Javanainen
21024e8638
Fix F2 temperature sensor ADC channel
...
On all F2 devices (F205/207/215/217) the sensor is connected to
ADC1_IN16, and is not shared with VBAT which is connected to ADC1_IN18.
2024-02-01 21:48:29 +02:00
Romain Goyet
aa767272a8
STM32WBA's high speed external clock has to run at 32 MHz
2024-02-01 13:42:48 -05:00
Caleb Garrett
1dbfa5ab72
Added hash v1/v2 configs.
2024-02-01 10:28:12 -05:00
Caleb Garrett
6e9ddd4626
Added hash module with blocking implementation. Included SHA256 example.
2024-01-31 21:21:36 -05:00
Dario Nieuwenhuis
7e02389995
Merge pull request #2410 from eZioPan/waveform-on-CHx
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impl waveform with TIM OC Channel DMA
2024-02-01 01:02:01 +00:00
Dario Nieuwenhuis
e613324e16
stm32/eth: rename new_rmii to new, update metapac to fix issues with PC2_C.
2024-02-01 01:39:52 +01:00
Simon B. Gasse
42d8f3930a
Implement MII interface
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- Extend the eth/v2 module to support MII besides RMII.
- Replace `Ethernet::new` with `Ethernet::new_mii` and
`Ethernet::new_rmii`.
- Update ethernet examples.
- Add example for MII ethernet.
2024-02-01 01:33:34 +01:00
Corey Schuhen
1de78d0490
Initial FDCAN driver implementation.
...
Original author:
Torin Cooper-Bennun <tcbennun@maxiluxsystems.com>
Cleanup and documentaion by:
Tomasz bla Fortuna <bla@reactor.local>
Corey Schuhen <cschuhen@gmail.com>
Use new PAC method now that the names are common.
Use broken out definitions that can be shared with bxcan
Populate Rx struct with an embassy timestamp.
Remove use of RefCell.
As per review comment. - THis will probably get squashed down.
Fix
2024-01-31 05:40:05 +10:00
Tomasz bla Fortuna
03ba45065e
Add FDCAN clock registers to G4 RCC.
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Author: Adam Morgan <adam@luci.com>
Break definitions out of bxcan that can be used innm fdcan.
Typo
2024-01-31 05:40:05 +10:00
Tomasz bla Fortuna
a91a7a8557
Add FDCAN dependency in correct flavor based on selected chip.
...
Author: Torin Cooper-Bennun <tcbennun@maxiluxsystems.com>
Change from review.
2024-01-31 05:40:05 +10:00
Dario Nieuwenhuis
5b2293e2b1
update stm32-metapac.
2024-01-30 02:34:12 +01:00
Dario Nieuwenhuis
3387ee7238
stm32/gpio: remove generics.
2024-01-22 21:31:06 +01:00
Dario Nieuwenhuis
43b6258a69
Merge pull request #2416 from andresv/stm32-fix-buffered-uart-flush
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stm32: fix buffered uart flush
2024-01-20 01:50:55 +00:00
Dario Nieuwenhuis
67159d80bb
Merge pull request #2429 from jr-oss/stm32_simple_pwm_add_set_output_compare_mode
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stm32/simple_pwm: add set_output_compare_mode
2024-01-20 01:33:49 +00:00
Dario Nieuwenhuis
326bff322e
Merge pull request #2415 from hdoordt/patch-1
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Make adc::Resolution::to_max_count const
2024-01-20 01:31:22 +00:00
Andres Vahter
ec2e3de0f4
stm32 uart: fix buffered flush for usart_v1, usart_v2
...
There is one caveat. For some reason with first send using usart_v1/usart_v2 TC flag appears right after first byte from buffer is written to DR. Consecutive transfers work as expected - TC flag appears when last byte is fully transferred to wire.
2024-01-20 00:15:40 +01:00
Andres Vahter
534c53c901
stm32 uart: remove unwrap
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unwraps take more space because of panics
2024-01-20 00:15:40 +01:00
Andres Vahter
c936d66934
stm32 uart: fix flush for non usart_v4 variants
...
Byte was written to TDR and right after that waker was called. This means `flush` would see that `tx_buf` is empty and can return Ready although actually hardware was still writing this last byte to the wire.
With this change non `usart_v4 ` variants would also use TC interrupt to check when last byte was sent out.
2024-01-20 00:15:39 +01:00
Andres Vahter
17d6e4eefe
stm32 uart: do not wake after sending each byte
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usart_v4 uses TC interrupt to see if all bytes are sent out from the FIFO and waker is called from this interrupt. This minimises unnecessary wakeups during sending.
2024-01-20 00:15:39 +01:00
Andres Vahter
ec47e931ac
stm32: fix buffered uart flush
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usart_v4 uses internal FIFO and therefore actually all bytes are not yet sent out although state.tx_buf.is_empty()
2024-01-20 00:15:39 +01:00
Harry Brooke
d781e231cd
make usart::State private
2024-01-19 23:20:20 +01:00
Dario Nieuwenhuis
9cd0beaee3
Merge pull request #2450 from shufps/feat/timer-driver-tim22-tim23
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adds timer-driver for tim21 and tim22 (on L0)
2024-01-15 12:01:22 +01:00
shufps
e969b88e5a
fixed trailing white spaces
2024-01-15 11:23:41 +01:00
shufps
2b64913664
fixed tim21
2024-01-15 08:11:35 +01:00
shufps
4e2361c024
adds timer-driver for tim21 and tim22 (on L0)
2024-01-15 08:11:22 +01:00
Dario Nieuwenhuis
583555bc8a
Suppress "unused" warnings.
2024-01-14 23:20:51 +01:00
shufps
018c48cf1c
changes to get usb working on a L1. Adds a usb_serial example too
2024-01-14 22:43:22 +01:00
Dario Nieuwenhuis
4c23f197b3
Fix invalid "async" crates.io category.
2024-01-12 00:39:01 +01:00
Dario Nieuwenhuis
6a1c415a4c
Complete cargo.tomls more.
2024-01-12 00:32:47 +01:00
Dario Nieuwenhuis
9f6517e408
stm32,nrf: add warning on docs.rs directing the user to docs.embassy.dev.
2024-01-11 23:43:17 +01:00
Dario Nieuwenhuis
5304994363
Add docs.rs metadata to all crates.
2024-01-11 23:17:02 +01:00
Dario Nieuwenhuis
22197320ff
bump embassy-time 0.3, embassy-executor 0.5, embassy-net 0.4.
2024-01-11 23:01:24 +01:00
Dario Nieuwenhuis
b3ab2d91f7
stm32: use released metapac.
2024-01-11 22:05:01 +01:00
Dario Nieuwenhuis
e18d673721
More readme fixes.
2024-01-11 21:23:07 +01:00
Barnaby Walters
557399e2d6
Included README.md in docs
2024-01-11 20:00:33 +01:00
Barnaby Walters
1697386820
Correction from review
2024-01-11 19:57:24 +01:00
Barnaby Walters
ccf61f50fe
Corrections from review
2024-01-11 19:55:15 +01:00
Barnaby Walters
4caafe10ae
Expanded readme for crates release
2024-01-11 19:49:05 +01:00
Dario Nieuwenhuis
15f94fb0fc
time: split driver into a separate embassy-time-driver crate.
2024-01-11 16:56:08 +01:00
Ralf
db776c9623
stm32/simple_pwm: add set_output_compare_mode
2024-01-10 18:48:26 +01:00
Dario Nieuwenhuis
3bc6e414f7
stm32: update metapac.
2024-01-10 18:06:47 +01:00
Dario Nieuwenhuis
495b8b739a
Change GPIO inherent methods back to &self.
...
With the embedded-hal rc3 update I changed them to require `&mut self`, but
in retrospect I think `&self` is better, for extra flexibility.
This PR reverts the changes from the rc3 update to inherent methods.
2024-01-10 00:00:10 +01:00
Dario Nieuwenhuis
c9ac39df94
Update embedded-hal to v1.0
2024-01-09 23:37:14 +01:00
Henk Oordt
45b7645525
Make adc::Resolution::to_max_count const
2024-01-08 13:56:21 +01:00
eZio Pan
b16cc04036
bug fix
2024-01-08 19:18:24 +08:00
eZio Pan
890a1269d0
refactor with clippy
2024-01-06 22:48:21 +08:00
eZio Pan
424ddaf3d9
impl waveform with TIM Channel
2024-01-06 22:22:38 +08:00
Dario Nieuwenhuis
294046cddb
Merge pull request #2405 from Sizurka/stm32g0-usb
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stm32: Add G0 USB RCC and example
2024-01-06 00:03:54 +00:00
Dario Nieuwenhuis
208ad8fbfc
stm32/flash: add support for f1.
2024-01-05 23:49:10 +01:00
Derek Hageman
801a36c7b4
stm32: Add G0 USB RCC
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Add configuration for STM32G0 USB clock.
2024-01-05 07:56:22 -07:00
Dario Nieuwenhuis
03ba4ae386
stm32: update metapac.
2024-01-03 18:39:22 +01:00
Tyler Gilbert
7944e854dd
Fix formatting of comments
2024-01-03 11:07:57 -06:00
